soc/intel/xeon_sp/chip_common: Improve the domain ID
Use a union to access the PCI domain ID. This will become handy in the following commits to gather meta-data from the domain ID. Change-Id: I5c371961768410167a571358f6f366847a259eb6 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/80099 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -12,12 +12,14 @@
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static const STACK_RES *domain_to_stack_res(const struct device *dev)
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{
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assert(dev->path.type == DEVICE_PATH_DOMAIN);
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const unsigned int dn = dev->path.domain.domain;
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const union xeon_domain_path dn = {
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.domain_path = dev->path.domain.domain
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};
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const IIO_UDS *hob = get_iio_uds();
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assert(hob != NULL);
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return &hob->PlatformData.IIO_resource[dn / MAX_LOGIC_IIO_STACK].StackRes[dn % MAX_LOGIC_IIO_STACK];
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return &hob->PlatformData.IIO_resource[dn.socket].StackRes[dn.stack];
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}
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void iio_pci_domain_read_resources(struct device *dev)
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@ -101,6 +103,7 @@ static struct device_operations iio_pcie_domain_ops = {
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void attach_iio_stacks(struct device *dev)
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{
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const IIO_UDS *hob = get_iio_uds();
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union xeon_domain_path dn = { .domain_path = 0 };
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if (!hob)
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return;
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@ -113,15 +116,20 @@ void attach_iio_stacks(struct device *dev)
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if (ri->BusBase > ri->BusLimit)
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continue;
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/* Prepare domain path */
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dn.socket = s;
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dn.stack = x;
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dn.bus = ri->BusBase;
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if (!is_pcie_iio_stack_res(ri)) {
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if (CONFIG(HAVE_IOAT_DOMAINS))
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soc_create_ioat_domains(dev->bus, ri);
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soc_create_ioat_domains(dn, dev->bus, ri);
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continue;
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}
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struct device_path path;
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path.type = DEVICE_PATH_DOMAIN;
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path.domain.domain = s * MAX_LOGIC_IIO_STACK + x;
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path.domain.domain = dn.domain_path;
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struct device *iio_domain = alloc_dev(dev->bus, &path);
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if (iio_domain == NULL)
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die("%s: out of memory.\n", __func__);
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@ -5,10 +5,20 @@
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#include <hob_iiouds.h>
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union xeon_domain_path {
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unsigned int domain_path;
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struct {
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u8 bus;
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u8 stack;
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u8 socket;
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u8 unused;
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};
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};
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void iio_pci_domain_read_resources(struct device *dev);
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void iio_pci_domain_scan_bus(struct device *dev);
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void attach_iio_stacks(struct device *dev);
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void soc_create_ioat_domains(struct bus *bus, const STACK_RES *sr);
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void soc_create_ioat_domains(union xeon_domain_path path, struct bus *bus, const STACK_RES *sr);
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#endif /* _CHIP_COMMON_H_ */
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@ -23,15 +23,20 @@ static struct device_operations ioat_domain_ops = {
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.scan_bus = pci_host_bridge_scan_bus,
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};
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static void create_ioat_domain(struct bus *const upstream, const unsigned int domain_base,
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static void create_ioat_domain(const union xeon_domain_path dp, struct bus *const upstream,
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const unsigned int bus_base, const unsigned int bus_limit,
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const resource_t mem32_base, const resource_t mem32_limit,
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const resource_t mem64_base, const resource_t mem64_limit)
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{
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union xeon_domain_path new_path = {
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.domain_path = dp.domain_path
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};
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new_path.bus = bus_base;
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struct device_path path = {
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.type = DEVICE_PATH_DOMAIN,
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.domain = {
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.domain = domain_base + bus_base,
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.domain = new_path.domain_path,
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},
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};
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struct device *const domain = alloc_dev(upstream, &path);
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@ -69,10 +74,8 @@ static void create_ioat_domain(struct bus *const upstream, const unsigned int do
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}
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}
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void soc_create_ioat_domains(struct bus *const bus, const STACK_RES *const sr)
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void soc_create_ioat_domains(const union xeon_domain_path path, struct bus *const bus, const STACK_RES *const sr)
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{
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const unsigned int domain_base = MAX_SOCKET * MAX_LOGIC_IIO_STACK;
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if (sr->BusLimit < sr->BusBase + HQM_BUS_OFFSET + HQM_RESERVED_BUS) {
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printk(BIOS_WARNING,
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"Ignoring IOAT domain with limited bus range.\n");
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@ -96,14 +99,14 @@ void soc_create_ioat_domains(struct bus *const bus, const STACK_RES *const sr)
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mem64_limit = mem64_base + CPM_MMIO_SIZE - 1;
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bus_base = sr->BusBase + CPM_BUS_OFFSET;
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bus_limit = bus_base + CPM_RESERVED_BUS;
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create_ioat_domain(bus, domain_base, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
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create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
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/* HQM0 */
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mem64_base = mem64_limit + 1;
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mem64_limit = mem64_base + HQM_MMIO_SIZE - 1;
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bus_base = sr->BusBase + HQM_BUS_OFFSET;
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bus_limit = bus_base + HQM_RESERVED_BUS;
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create_ioat_domain(bus, domain_base, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
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create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
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/* CPM1 (optional) */
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mem64_base = mem64_limit + 1;
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@ -111,7 +114,7 @@ void soc_create_ioat_domains(struct bus *const bus, const STACK_RES *const sr)
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bus_base = sr->BusBase + CPM1_BUS_OFFSET;
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bus_limit = bus_base + CPM_RESERVED_BUS;
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if (bus_limit <= sr->BusLimit)
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create_ioat_domain(bus, domain_base, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
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create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
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/* HQM1 (optional) */
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mem64_base = mem64_limit + 1;
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@ -119,13 +122,13 @@ void soc_create_ioat_domains(struct bus *const bus, const STACK_RES *const sr)
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bus_base = sr->BusBase + HQM1_BUS_OFFSET;
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bus_limit = bus_base + HQM_RESERVED_BUS;
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if (bus_limit <= sr->BusLimit)
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create_ioat_domain(bus, domain_base, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
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create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
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/* DINO */
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mem64_base = mem64_limit + 1;
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mem64_limit = sr->PciResourceMem64Limit;
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bus_base = sr->BusBase;
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bus_limit = bus_base;
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create_ioat_domain(bus, domain_base, bus_base, bus_limit, sr->PciResourceMem32Base, sr->PciResourceMem32Limit,
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create_ioat_domain(path, bus, bus_base, bus_limit, sr->PciResourceMem32Base, sr->PciResourceMem32Limit,
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mem64_base, mem64_limit);
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}
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