soc/intel/xeon_sp/chip_common: Improve the domain ID

Use a union to access the PCI domain ID.
This will become handy in the following commits to gather meta-data
from the domain ID.

Change-Id: I5c371961768410167a571358f6f366847a259eb6
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80099
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph 2024-01-19 17:28:47 +01:00 committed by Lean Sheng Tan
parent ab6bcd2c1a
commit 8c99ebc97a
3 changed files with 36 additions and 15 deletions

View file

@ -12,12 +12,14 @@
static const STACK_RES *domain_to_stack_res(const struct device *dev) static const STACK_RES *domain_to_stack_res(const struct device *dev)
{ {
assert(dev->path.type == DEVICE_PATH_DOMAIN); assert(dev->path.type == DEVICE_PATH_DOMAIN);
const unsigned int dn = dev->path.domain.domain; const union xeon_domain_path dn = {
.domain_path = dev->path.domain.domain
};
const IIO_UDS *hob = get_iio_uds(); const IIO_UDS *hob = get_iio_uds();
assert(hob != NULL); assert(hob != NULL);
return &hob->PlatformData.IIO_resource[dn / MAX_LOGIC_IIO_STACK].StackRes[dn % MAX_LOGIC_IIO_STACK]; return &hob->PlatformData.IIO_resource[dn.socket].StackRes[dn.stack];
} }
void iio_pci_domain_read_resources(struct device *dev) void iio_pci_domain_read_resources(struct device *dev)
@ -101,6 +103,7 @@ static struct device_operations iio_pcie_domain_ops = {
void attach_iio_stacks(struct device *dev) void attach_iio_stacks(struct device *dev)
{ {
const IIO_UDS *hob = get_iio_uds(); const IIO_UDS *hob = get_iio_uds();
union xeon_domain_path dn = { .domain_path = 0 };
if (!hob) if (!hob)
return; return;
@ -113,15 +116,20 @@ void attach_iio_stacks(struct device *dev)
if (ri->BusBase > ri->BusLimit) if (ri->BusBase > ri->BusLimit)
continue; continue;
/* Prepare domain path */
dn.socket = s;
dn.stack = x;
dn.bus = ri->BusBase;
if (!is_pcie_iio_stack_res(ri)) { if (!is_pcie_iio_stack_res(ri)) {
if (CONFIG(HAVE_IOAT_DOMAINS)) if (CONFIG(HAVE_IOAT_DOMAINS))
soc_create_ioat_domains(dev->bus, ri); soc_create_ioat_domains(dn, dev->bus, ri);
continue; continue;
} }
struct device_path path; struct device_path path;
path.type = DEVICE_PATH_DOMAIN; path.type = DEVICE_PATH_DOMAIN;
path.domain.domain = s * MAX_LOGIC_IIO_STACK + x; path.domain.domain = dn.domain_path;
struct device *iio_domain = alloc_dev(dev->bus, &path); struct device *iio_domain = alloc_dev(dev->bus, &path);
if (iio_domain == NULL) if (iio_domain == NULL)
die("%s: out of memory.\n", __func__); die("%s: out of memory.\n", __func__);

View file

@ -5,10 +5,20 @@
#include <hob_iiouds.h> #include <hob_iiouds.h>
union xeon_domain_path {
unsigned int domain_path;
struct {
u8 bus;
u8 stack;
u8 socket;
u8 unused;
};
};
void iio_pci_domain_read_resources(struct device *dev); void iio_pci_domain_read_resources(struct device *dev);
void iio_pci_domain_scan_bus(struct device *dev); void iio_pci_domain_scan_bus(struct device *dev);
void attach_iio_stacks(struct device *dev); void attach_iio_stacks(struct device *dev);
void soc_create_ioat_domains(struct bus *bus, const STACK_RES *sr); void soc_create_ioat_domains(union xeon_domain_path path, struct bus *bus, const STACK_RES *sr);
#endif /* _CHIP_COMMON_H_ */ #endif /* _CHIP_COMMON_H_ */

View file

@ -23,15 +23,20 @@ static struct device_operations ioat_domain_ops = {
.scan_bus = pci_host_bridge_scan_bus, .scan_bus = pci_host_bridge_scan_bus,
}; };
static void create_ioat_domain(struct bus *const upstream, const unsigned int domain_base, static void create_ioat_domain(const union xeon_domain_path dp, struct bus *const upstream,
const unsigned int bus_base, const unsigned int bus_limit, const unsigned int bus_base, const unsigned int bus_limit,
const resource_t mem32_base, const resource_t mem32_limit, const resource_t mem32_base, const resource_t mem32_limit,
const resource_t mem64_base, const resource_t mem64_limit) const resource_t mem64_base, const resource_t mem64_limit)
{ {
union xeon_domain_path new_path = {
.domain_path = dp.domain_path
};
new_path.bus = bus_base;
struct device_path path = { struct device_path path = {
.type = DEVICE_PATH_DOMAIN, .type = DEVICE_PATH_DOMAIN,
.domain = { .domain = {
.domain = domain_base + bus_base, .domain = new_path.domain_path,
}, },
}; };
struct device *const domain = alloc_dev(upstream, &path); struct device *const domain = alloc_dev(upstream, &path);
@ -69,10 +74,8 @@ static void create_ioat_domain(struct bus *const upstream, const unsigned int do
} }
} }
void soc_create_ioat_domains(struct bus *const bus, const STACK_RES *const sr) void soc_create_ioat_domains(const union xeon_domain_path path, struct bus *const bus, const STACK_RES *const sr)
{ {
const unsigned int domain_base = MAX_SOCKET * MAX_LOGIC_IIO_STACK;
if (sr->BusLimit < sr->BusBase + HQM_BUS_OFFSET + HQM_RESERVED_BUS) { if (sr->BusLimit < sr->BusBase + HQM_BUS_OFFSET + HQM_RESERVED_BUS) {
printk(BIOS_WARNING, printk(BIOS_WARNING,
"Ignoring IOAT domain with limited bus range.\n"); "Ignoring IOAT domain with limited bus range.\n");
@ -96,14 +99,14 @@ void soc_create_ioat_domains(struct bus *const bus, const STACK_RES *const sr)
mem64_limit = mem64_base + CPM_MMIO_SIZE - 1; mem64_limit = mem64_base + CPM_MMIO_SIZE - 1;
bus_base = sr->BusBase + CPM_BUS_OFFSET; bus_base = sr->BusBase + CPM_BUS_OFFSET;
bus_limit = bus_base + CPM_RESERVED_BUS; bus_limit = bus_base + CPM_RESERVED_BUS;
create_ioat_domain(bus, domain_base, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit); create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
/* HQM0 */ /* HQM0 */
mem64_base = mem64_limit + 1; mem64_base = mem64_limit + 1;
mem64_limit = mem64_base + HQM_MMIO_SIZE - 1; mem64_limit = mem64_base + HQM_MMIO_SIZE - 1;
bus_base = sr->BusBase + HQM_BUS_OFFSET; bus_base = sr->BusBase + HQM_BUS_OFFSET;
bus_limit = bus_base + HQM_RESERVED_BUS; bus_limit = bus_base + HQM_RESERVED_BUS;
create_ioat_domain(bus, domain_base, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit); create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
/* CPM1 (optional) */ /* CPM1 (optional) */
mem64_base = mem64_limit + 1; mem64_base = mem64_limit + 1;
@ -111,7 +114,7 @@ void soc_create_ioat_domains(struct bus *const bus, const STACK_RES *const sr)
bus_base = sr->BusBase + CPM1_BUS_OFFSET; bus_base = sr->BusBase + CPM1_BUS_OFFSET;
bus_limit = bus_base + CPM_RESERVED_BUS; bus_limit = bus_base + CPM_RESERVED_BUS;
if (bus_limit <= sr->BusLimit) if (bus_limit <= sr->BusLimit)
create_ioat_domain(bus, domain_base, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit); create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
/* HQM1 (optional) */ /* HQM1 (optional) */
mem64_base = mem64_limit + 1; mem64_base = mem64_limit + 1;
@ -119,13 +122,13 @@ void soc_create_ioat_domains(struct bus *const bus, const STACK_RES *const sr)
bus_base = sr->BusBase + HQM1_BUS_OFFSET; bus_base = sr->BusBase + HQM1_BUS_OFFSET;
bus_limit = bus_base + HQM_RESERVED_BUS; bus_limit = bus_base + HQM_RESERVED_BUS;
if (bus_limit <= sr->BusLimit) if (bus_limit <= sr->BusLimit)
create_ioat_domain(bus, domain_base, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit); create_ioat_domain(path, bus, bus_base, bus_limit, 0, -1, mem64_base, mem64_limit);
/* DINO */ /* DINO */
mem64_base = mem64_limit + 1; mem64_base = mem64_limit + 1;
mem64_limit = sr->PciResourceMem64Limit; mem64_limit = sr->PciResourceMem64Limit;
bus_base = sr->BusBase; bus_base = sr->BusBase;
bus_limit = bus_base; bus_limit = bus_base;
create_ioat_domain(bus, domain_base, bus_base, bus_limit, sr->PciResourceMem32Base, sr->PciResourceMem32Limit, create_ioat_domain(path, bus, bus_base, bus_limit, sr->PciResourceMem32Base, sr->PciResourceMem32Limit,
mem64_base, mem64_limit); mem64_base, mem64_limit);
} }