mb/google/fizz: set SD_CDZ to edge trigger.
This is to align with the SD_CD GpioInt setting in acpi BUG=b:62067569 TEST=checked unused interrupt on SD_CD does not happen after s3 resume Change-Id: I40aefcb0f571e7f6773a6d20226f357707aa041a Signed-off-by: Kane Chen <kane.chen@intel.com> Reviewed-on: https://review.coreboot.org/20001 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
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@ -42,7 +42,8 @@ static const struct pad_config gpio_table[] = {
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/* ESPI_IO3 */
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/* ESPI_CS# */
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/* SERIRQ */ PAD_CFG_NC(GPP_A6), /* TP331 */
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/* PIRQA# */ PAD_CFG_GPI(GPP_A7, 20K_PU, DEEP), /* SD_CDZ */
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/* PIRQA# */ PAD_CFG_GPI_INT(GPP_A7, 20K_PU, DEEP,
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EDGE), /* SD_CDZ */
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/* CLKRUN# */ PAD_CFG_NC(GPP_A8), /* TP329 */
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/* ESPI_CLK */
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/* CLKOUT_LPC1 */ PAD_CFG_NC(GPP_A10), /* TP188 */
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