diff --git a/src/northbridge/intel/haswell/finalize.c b/src/northbridge/intel/haswell/finalize.c
index efbaf68074..1c83110a60 100644
--- a/src/northbridge/intel/haswell/finalize.c
+++ b/src/northbridge/intel/haswell/finalize.c
@@ -24,6 +24,7 @@ void intel_northbridge_haswell_finalize_smm(void)
 	MCHBAR32_OR(REQLIM, 1UL << 31);
 	MCHBAR32_OR(DMIVCLIM, 1UL << 31);
 	MCHBAR32_OR(CRDTLCK, 1 << 0);
+	MCHBAR32_OR(MCARBLCK, 1 << 0);
 
 	/* Memory Controller Lockdown */
 	MCHBAR8(MC_LOCK) = 0x8f;
diff --git a/src/northbridge/intel/haswell/registers/mchbar.h b/src/northbridge/intel/haswell/registers/mchbar.h
index bd99cee585..97ae433412 100644
--- a/src/northbridge/intel/haswell/registers/mchbar.h
+++ b/src/northbridge/intel/haswell/registers/mchbar.h
@@ -47,5 +47,6 @@
 #define REQLIM			0x6800
 #define DMIVCLIM		0x7000
 #define CRDTLCK			0x77fc
+#define MCARBLCK		0x7ffc
 
 #endif /* __HASWELL_REGISTERS_MCHBAR_H__ */