rk3288: support single channel ddr

When using single-channel ddr, DMC channel 1 need to reset dll,
otherwise it will lead to pmdomain idle request fails.

BUG=chrome-os-partner:35654
BRANCH=veyron
TEST=boot rialto

Change-Id: Id6b673187c688d238e9a391b3d98720c783e3af4
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 927e8426104f8869e139c3f60a04cd49bf726e61
Original-Change-Id: I8be1567040ddb5f2a2b0d06568e517d794ead87a
Original-Signed-off-by: jinkun.hong <jinkun.hong@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/250060
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9819
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
This commit is contained in:
jinkun.hong 2015-02-14 15:07:50 +08:00 committed by Patrick Georgi
parent 9f5ad9b6d9
commit 8cc3a2a467
1 changed files with 4 additions and 1 deletions

View File

@ -987,7 +987,7 @@ void sdram_init(const struct rk3288_sdram_params *sdram_params)
rkclk_configure_ddr(sdram_params->ddr_freq);
for (channel = 0; channel < sdram_params->num_channels; channel++) {
for (channel = 0; channel < 2; channel++) {
struct rk3288_ddr_pctl_regs *ddr_pctl_regs =
rk3288_ddr_pctl[channel];
struct rk3288_ddr_publ_regs *ddr_publ_regs =
@ -996,6 +996,9 @@ void sdram_init(const struct rk3288_sdram_params *sdram_params)
phy_pctrl_reset(ddr_publ_regs, channel);
phy_dll_bypass_set(ddr_publ_regs, sdram_params->ddr_freq);
if (channel >= sdram_params->num_channels)
continue;
dfi_cfg(ddr_pctl_regs, sdram_params->dramtype);
pctl_cfg(channel, sdram_params);