merge minor solo changes
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -42,7 +42,7 @@ option IRQ_SLOT_COUNT=7
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## Build code to export an x86 MP table
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## Useful for specifying IRQ routing values
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##
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option HAVE_MP_TABLE=0
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option HAVE_MP_TABLE=1
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##
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## Build code to export a CMOS option table
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@ -52,7 +52,7 @@ option HAVE_OPTION_TABLE=1
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##
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## AMD Solo is a 1cpu board
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##
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option CONFIG_SMP=0
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option CONFIG_SMP=1
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option CONFIG_MAX_CPUS=1
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##
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@ -135,7 +135,7 @@ arch i386 end
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##
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driver mainboard.o
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# if HAVE_MP_TABLE object mptable.o end
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if HAVE_MP_TABLE object mptable.o end
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if HAVE_PIRQ_TABLE object irq_tables.o end
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object reset.o
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@ -158,7 +158,7 @@ makerule ./auto.E
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end
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makerule ./auto.inc
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depends "./auto.E ./romcc"
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action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc"
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action "./romcc -mcpu=k8 -O2 ./auto.E > auto.inc"
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end
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##
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@ -238,12 +238,12 @@ northbridge amd/amdk8 "mc0"
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pci 0:1.1 on
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pci 0:1.2 on
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pci 0:1.3 on
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pci 0:1.5 off
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pci 0:1.6 off
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pci 0:1.5 on
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pci 0:1.6 on
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pci 1:0.0 on
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pci 1:0.1 on
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pci 1:0.2 on
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pci 1:1.0 off
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pci 1:1.0 on
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superio NSC/pc87360 link 1
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pnp 2e.0
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pnp 2e.1
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@ -263,7 +263,6 @@ northbridge amd/amdk8 "mc0"
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end
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cpu k8 "cpu0"
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register "up" = "{ .chip = &amd8111, .ht_width=16, .ht_speed=600 }"
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end
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##
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@ -54,8 +54,8 @@ option CC="gcc -m32"
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option CONFIG_CHIP_CONFIGURE=1
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option MAXIMUM_CONSOLE_LOGLEVEL=8
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option DEFAULT_CONSOLE_LOGLEVEL=8
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option MAXIMUM_CONSOLE_LOGLEVEL=10
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option DEFAULT_CONSOLE_LOGLEVEL=10
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option CONFIG_CONSOLE_SERIAL8250=1
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option CPU_FIXUP=1
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@ -99,4 +99,4 @@ romimage "fallback"
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payload /suse/stepan/tg3--ide_disk.zelf
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end
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buildrom ./linuxbios.rom ROM_SIZE "normal" "fallback"
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buildrom ./solo.rom ROM_SIZE "normal" "fallback"
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