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Convert boards to use mptable_write_buses. 

Signed-off-by: Patrick Georgi <patrick@georgi-clan.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6105 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi 2010-11-21 14:40:09 +00:00 committed by Patrick Georgi
parent d8a789f6df
commit 8cda9699d4
41 changed files with 42 additions and 447 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

23
src/mainboard/amd/dbm690t/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs690[8];
u8 bus_sb600[2];
u32 apicid_sb600;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs690;
u32 sbdn_sb600;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs690[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs690[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb600[0] = bus_rs690[0];
bus_type[bus_rs690[0]] = 1;
/* sb600 */
dev = dev_find_slot(bus_sb600[0], PCI_DEVFN(sbdn_sb600 + 0x14, 4));
if (dev) {
bus_sb600[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb600[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs690 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs690[0], PCI_DEVFN(sbdn_rs690 + i, 0));
if (dev) {
bus_rs690[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs690[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs690[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/amd/dbm690t/irq_tables.c
View File

@ -51,7 +51,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern unsigned long sbdn_sb600;

11
src/mainboard/amd/dbm690t/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern u32 apicid_sb600;
extern u32 bus_type[256];
extern u32 sbdn_rs690;
extern u32 sbdn_sb600;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/amd/mahogany/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs780[11];
u8 bus_sb700[2];
u32 apicid_sb700;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs780;
u32 sbdn_sb700;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs780[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs780[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb700[0] = bus_rs780[0];
bus_type[bus_rs780[0]] = 1;
/* sb700 */
dev = dev_find_slot(bus_sb700[0], PCI_DEVFN(sbdn_sb700 + 0x14, 4));
if (dev) {
bus_sb700[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb700[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs780 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs780[0], PCI_DEVFN(sbdn_rs780 + i, 0));
if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs780[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/amd/mahogany/irq_tables.c
View File

@ -51,7 +51,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

11
src/mainboard/amd/mahogany/mptable.c
View File

@ -26,20 +26,18 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs780[11];
extern u8 bus_sb700[2];
extern u32 apicid_sb700;
extern u32 bus_type[256];
extern u32 sbdn_rs780;
extern u32 sbdn_sb700;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -49,12 +47,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/amd/mahogany_fam10/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs780[11];
u8 bus_sb700[2];
u32 apicid_sb700;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs780;
u32 sbdn_sb700;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs780[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs780[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb700[0] = bus_rs780[0];
bus_type[bus_rs780[0]] = 1;
/* sb700 */
dev = dev_find_slot(bus_sb700[0], PCI_DEVFN(sbdn_sb700 + 0x14, 4));
if (dev) {
bus_sb700[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb700[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs780 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs780[0], PCI_DEVFN(sbdn_rs780 + i, 0));
if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs780[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/amd/mahogany_fam10/irq_tables.c
View File

@ -45,7 +45,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

11
src/mainboard/amd/mahogany_fam10/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs780[11];
extern u8 bus_sb700[2];
extern u32 apicid_sb700;
extern u32 bus_type[256];
extern u32 sbdn_rs780;
extern u32 sbdn_sb700;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/amd/pistachio/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs690[8];
u8 bus_sb600[2];
u32 apicid_sb600;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs690;
u32 sbdn_sb600;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs690[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs690[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb600[0] = bus_rs690[0];
bus_type[bus_rs690[0]] = 1;
/* sb600 */
dev = dev_find_slot(bus_sb600[0], PCI_DEVFN(sbdn_sb600 + 0x14, 4));
if (dev) {
bus_sb600[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb600[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs690 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs690[0], PCI_DEVFN(sbdn_rs690 + i, 0));
if (dev) {
bus_rs690[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs690[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs690[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/amd/pistachio/irq_tables.c
View File

@ -51,7 +51,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern u32 sbdn_sb600;

11
src/mainboard/amd/pistachio/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern u32 apicid_sb600;
extern u32 bus_type[256];
extern u32 sbdn_rs690;
extern u32 sbdn_sb600;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/amd/tilapia_fam10/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs780[11];
u8 bus_sb700[2];
u32 apicid_sb700;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs780;
u32 sbdn_sb700;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs780[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs780[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb700[0] = bus_rs780[0];
bus_type[bus_rs780[0]] = 1;
/* sb700 */
dev = dev_find_slot(bus_sb700[0], PCI_DEVFN(sbdn_sb700 + 0x14, 4));
if (dev) {
bus_sb700[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb700[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs780 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs780[0], PCI_DEVFN(sbdn_rs780 + i, 0));
if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs780[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/amd/tilapia_fam10/irq_tables.c
View File

@ -45,7 +45,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

11
src/mainboard/amd/tilapia_fam10/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs780[11];
extern u8 bus_sb700[2];
extern u32 apicid_sb700;
extern u32 bus_type[256];
extern u32 sbdn_rs780;
extern u32 sbdn_sb700;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/asrock/939a785gmh/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs780[11];
u8 bus_sb700[2];
u32 apicid_sb700;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs780;
u32 sbdn_sb700;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs780[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs780[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb700[0] = bus_rs780[0];
bus_type[bus_rs780[0]] = 1;
/* sb700 */
dev = dev_find_slot(bus_sb700[0], PCI_DEVFN(sbdn_sb700 + 0x14, 4));
if (dev) {
bus_sb700[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb700[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs780 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs780[0], PCI_DEVFN(sbdn_rs780 + i, 0));
if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs780[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/asrock/939a785gmh/irq_tables.c
View File

@ -51,7 +51,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

11
src/mainboard/asrock/939a785gmh/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs780[11];
extern u8 bus_sb700[2];
extern u32 apicid_sb700;
extern u32 bus_type[256];
extern u32 sbdn_rs780;
extern u32 sbdn_sb700;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/asus/m4a785-m/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs780[11];
u8 bus_sb700[2];
u32 apicid_sb700;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs780;
u32 sbdn_sb700;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs780[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs780[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb700[0] = bus_rs780[0];
bus_type[bus_rs780[0]] = 1;
/* sb700 */
dev = dev_find_slot(bus_sb700[0], PCI_DEVFN(sbdn_sb700 + 0x14, 4));
if (dev) {
bus_sb700[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb700[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs780 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs780[0], PCI_DEVFN(sbdn_rs780 + i, 0));
if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs780[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

11
src/mainboard/asus/m4a785-m/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs780[11];
extern u8 bus_sb700[2];
extern u32 apicid_sb700;
extern u32 bus_type[256];
extern u32 sbdn_rs780;
extern u32 sbdn_sb700;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/gigabyte/ma785gmt/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs780[11];
u8 bus_sb700[2];
u32 apicid_sb700;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs780;
u32 sbdn_sb700;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs780[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs780[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb700[0] = bus_rs780[0];
bus_type[bus_rs780[0]] = 1;
/* sb700 */
dev = dev_find_slot(bus_sb700[0], PCI_DEVFN(sbdn_sb700 + 0x14, 4));
if (dev) {
bus_sb700[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb700[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs780 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs780[0], PCI_DEVFN(sbdn_rs780 + i, 0));
if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs780[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/gigabyte/ma785gmt/irq_tables.c
View File

@ -45,7 +45,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

11
src/mainboard/gigabyte/ma785gmt/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs780[11];
extern u8 bus_sb700[2];
extern u32 apicid_sb700;
extern u32 bus_type[256];
extern u32 sbdn_rs780;
extern u32 sbdn_sb700;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/gigabyte/ma78gm/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs780[11];
u8 bus_sb700[2];
u32 apicid_sb700;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs780;
u32 sbdn_sb700;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs780[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs780[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb700[0] = bus_rs780[0];
bus_type[bus_rs780[0]] = 1;
/* sb700 */
dev = dev_find_slot(bus_sb700[0], PCI_DEVFN(sbdn_sb700 + 0x14, 4));
if (dev) {
bus_sb700[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb700[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs780 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs780[0], PCI_DEVFN(sbdn_rs780 + i, 0));
if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs780[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/gigabyte/ma78gm/irq_tables.c
View File

@ -45,7 +45,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

11
src/mainboard/gigabyte/ma78gm/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs780[11];
extern u8 bus_sb700[2];
extern u32 apicid_sb700;
extern u32 bus_type[256];
extern u32 sbdn_rs780;
extern u32 sbdn_sb700;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/iei/kino-780am2-fam10/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs780[11];
u8 bus_sb700[2];
u32 apicid_sb700;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs780;
u32 sbdn_sb700;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs780[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs780[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb700[0] = bus_rs780[0];
bus_type[bus_rs780[0]] = 1;
/* sb700 */
dev = dev_find_slot(bus_sb700[0], PCI_DEVFN(sbdn_sb700 + 0x14, 4));
if (dev) {
bus_sb700[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb700[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs780 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs780[0], PCI_DEVFN(sbdn_rs780 + i, 0));
if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs780[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/iei/kino-780am2-fam10/irq_tables.c
View File

@ -45,7 +45,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

11
src/mainboard/iei/kino-780am2-fam10/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs780[11];
extern u8 bus_sb700[2];
extern u32 apicid_sb700;
extern u32 bus_type[256];
extern u32 sbdn_rs780;
extern u32 sbdn_sb700;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/jetway/pa78vm5/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs780[11];
u8 bus_sb700[2];
u32 apicid_sb700;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs780;
u32 sbdn_sb700;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs780[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs780[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb700[0] = bus_rs780[0];
bus_type[bus_rs780[0]] = 1;
/* sb700 */
dev = dev_find_slot(bus_sb700[0], PCI_DEVFN(sbdn_sb700 + 0x14, 4));
if (dev) {
bus_sb700[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb700[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs780 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs780[0], PCI_DEVFN(sbdn_rs780 + i, 0));
if (dev) {
bus_rs780[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs780[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs780[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/jetway/pa78vm5/irq_tables.c
View File

@ -45,7 +45,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs780[8];
extern u8 bus_sb700[2];
extern unsigned long sbdn_sb700;

11
src/mainboard/jetway/pa78vm5/mptable.c
View File

@ -26,20 +26,18 @@
#include <stdint.h>
#include <cpu/amd/amdfam10_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs780[11];
extern u8 bus_sb700[2];
extern u32 apicid_sb700;
extern u32 bus_type[256];
extern u32 sbdn_rs780;
extern u32 sbdn_sb700;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -49,12 +47,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/kontron/kt690/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs690[8];
u8 bus_sb600[2];
u32 apicid_sb600;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs690;
u32 sbdn_sb600;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs690[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs690[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb600[0] = bus_rs690[0];
bus_type[bus_rs690[0]] = 1;
/* sb600 */
dev = dev_find_slot(bus_sb600[0], PCI_DEVFN(sbdn_sb600 + 0x14, 4));
if (dev) {
bus_sb600[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb600[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs690 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs690[0], PCI_DEVFN(sbdn_rs690 + i, 0));
if (dev) {
bus_rs690[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs690[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs690[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/kontron/kt690/irq_tables.c
View File

@ -51,7 +51,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern unsigned long sbdn_sb600;

11
src/mainboard/kontron/kt690/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern u32 apicid_sb600;
extern u32 bus_type[256];
extern u32 sbdn_rs690;
extern u32 sbdn_sb600;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/technexion/tim5690/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs690[8];
u8 bus_sb600[2];
u32 apicid_sb600;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs690;
u32 sbdn_sb600;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs690[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs690[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb600[0] = bus_rs690[0];
bus_type[bus_rs690[0]] = 1;
/* sb600 */
dev = dev_find_slot(bus_sb600[0], PCI_DEVFN(sbdn_sb600 + 0x14, 4));
if (dev) {
bus_sb600[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb600[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs690 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs690[0], PCI_DEVFN(sbdn_rs690 + i, 0));
if (dev) {
bus_rs690[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs690[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs690[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/technexion/tim5690/irq_tables.c
View File

@ -51,7 +51,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern unsigned long sbdn_sb600;

11
src/mainboard/technexion/tim5690/mptable.c
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@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern u32 apicid_sb600;
extern u32 bus_type[256];
extern u32 sbdn_rs690;
extern u32 sbdn_sb600;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{

23
src/mainboard/technexion/tim8690/get_bus_conf.c
View File

@ -32,7 +32,6 @@
/* Global variables for MB layouts and these will be shared by irqtable mptable
* and acpi_tables busnum is default.
*/
u8 bus_isa;
u8 bus_rs690[8];
u8 bus_sb600[2];
u32 apicid_sb600;
@ -54,8 +53,6 @@ u32 hcdnx[] = {
0x20202020,
};
u32 bus_type[256];
u32 sbdn_rs690;
u32 sbdn_sb600;
@ -67,7 +64,7 @@ void get_bus_conf(void)
{
u32 apicid_base;
device_t dev;
int i, j;
int i;
if (get_bus_conf_done == 1)
return; /* do it only once */
@ -92,25 +89,13 @@ void get_bus_conf(void)
bus_rs690[i] = 0;
}
for (i = 0; i < 256; i++) {
bus_type[i] = 0; /* default ISA bus. */
}
bus_type[0] = 1; /* pci */
bus_rs690[0] = (sysconf.pci1234[0] >> 16) & 0xff;
bus_sb600[0] = bus_rs690[0];
bus_type[bus_rs690[0]] = 1;
/* sb600 */
dev = dev_find_slot(bus_sb600[0], PCI_DEVFN(sbdn_sb600 + 0x14, 4));
if (dev) {
bus_sb600[1] = pci_read_config8(dev, PCI_SECONDARY_BUS);
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
for (j = bus_sb600[1]; j < bus_isa; j++)
bus_type[j] = 1;
}
/* rs690 */
@ -118,16 +103,10 @@ void get_bus_conf(void)
dev = dev_find_slot(bus_rs690[0], PCI_DEVFN(sbdn_rs690 + i, 0));
if (dev) {
bus_rs690[i] = pci_read_config8(dev, PCI_SECONDARY_BUS);
if(255 != bus_rs690[i]) {
bus_isa = pci_read_config8(dev, PCI_SUBORDINATE_BUS);
bus_isa++;
bus_type[bus_rs690[i]] = 1; /* PCI bus. */
}
}
}
/* I/O APICs: APIC ID Version State Address */
bus_isa = 10;
#if CONFIG_LOGICAL_CPUS==1
apicid_base = get_apicid_base(1);
#else

1
src/mainboard/technexion/tim8690/irq_tables.c
View File

@ -51,7 +51,6 @@ static void write_pirq_info(struct irq_info *pirq_info, u8 bus, u8 devfn,
pirq_info->slot = slot;
pirq_info->rfu = rfu;
}
extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern unsigned long sbdn_sb600;

11
src/mainboard/technexion/tim8690/mptable.c
View File

@ -25,20 +25,18 @@
#include <stdint.h>
#include <cpu/amd/amdk8_sysconf.h>
extern u8 bus_isa;
extern u8 bus_rs690[8];
extern u8 bus_sb600[2];
extern u32 apicid_sb600;
extern u32 bus_type[256];
extern u32 sbdn_rs690;
extern u32 sbdn_sb600;
static void *smp_write_config_table(void *v)
{
struct mp_config_table *mc;
int j;
int bus_isa;
mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
@ -48,12 +46,7 @@ static void *smp_write_config_table(void *v)
get_bus_conf();
/* Bus: Bus ID Type */
/* define bus and isa numbers */
for (j = 0; j < bus_isa; j++) {
smp_write_bus(mc, j, (char *)"PCI ");
}
smp_write_bus(mc, bus_isa, (char *)"ISA ");
mptable_write_buses(mc, NULL, &bus_isa);
/* I/O APICs: APIC ID Version State Address */
{