soc/qualcomm/ipq40xx: Return NULL for cbmem_top if DRAM is not initialized

DRAM initialization on gale requires ipq blobs to be
loaded from cbfs. vboot_locator first checks cbmem_find to see if cbmem is
initialized and contains selected region info, else it falls back to
vboot work buffer.

Since cbmem_find calls into cbmem_top to identify the location of
cbmem area, board/chipset is expected to return NULL until the backing
store is ready, which in this case until DRAM is initialized in
romstage, return NULL for cbmem_top.

BUG=chrome-os-partner:49249
TEST=Able to compile and boot to depthcharge. Doesn't crash in
imd_handle_init_partial_recovery
BRANCH=none

Change-Id: Iaac24252ee4fb9f59d767730bf9dd68baa42a68f
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 4849c15dee2d3782ede4ee4157e432bd4d5602f0
Original-Change-Id: I3722b7ab5a6585a250138c828eb3d7919b0c1178
Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/335425
Original-Commit-Ready: David Hendricks <dhendrix@chromium.org>
Original-Reviewed-by: David Hendricks <dhendrix@chromium.org>
Reviewed-on: https://review.coreboot.org/14660
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth@google.com>
This commit is contained in:
Varadarajan Narayanan 2016-03-29 12:30:38 +05:30 committed by Patrick Georgi
parent 9f1e0c5428
commit 8ce14a7948
4 changed files with 23 additions and 0 deletions

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@ -12,6 +12,7 @@
#include <arch/cache.h>
#include <symbols.h>
#include <soc/soc_services.h>
#include "mmu.h"
#define WIFI_IMEM_0_START ((uintptr_t)_wifi_imem_0 / KiB)
@ -33,6 +34,8 @@ void setup_dram_mappings(enum dram_state dram)
mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
/* Map DMA memory */
mmu_config_range(DMA_START, DMA_SIZE, DCACHE_OFF);
/* Mark cbmem backing store as ready. */
ipq_cbmem_backing_store_ready();
} else {
mmu_disable_range(DRAM_START, DRAM_SIZE);
/* Map DMA memory */

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@ -16,6 +16,7 @@
ifeq ($(CONFIG_SOC_QC_IPQ40XX),y)
bootblock-y += clock.c
bootblock-y += cbmem.c
bootblock-y += gpio.c
bootblock-$(CONFIG_SPI_FLASH) += spi.c
bootblock-y += timer.c

View File

@ -16,7 +16,23 @@
#include <cbmem.h>
#include <soc/soc_services.h>
static int cbmem_backing_store_ready;
void ipq_cbmem_backing_store_ready(void)
{
cbmem_backing_store_ready = 1;
}
void *cbmem_top(void)
{
/*
* In romstage, make sure that cbmem backing store is ready before
* returning pointer to cbmem top. Otherwise, it could lead to issues
* with components that utilize cbmem in romstage (e.g. vboot_locator
* for loading ipq blobs before DRAM is initialized).
*/
if (ENV_ROMSTAGE && (cbmem_backing_store_ready == 0))
return NULL;
return _memlayout_cbmem_top;
}

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@ -32,4 +32,7 @@ int tz_init_wrapper(int, int, void *);
/* Load RPM code into memory and trigger its execution. */
void start_rpm(void);
/* Mark cbmem backing store as ready. */
void ipq_cbmem_backing_store_ready(void);
#endif