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mb/google/atlas: Add DISPLAY_DCR_EN GPIO pin 

This defines new GPIO pin for controlling the display panel CABC
function.  The default value is high (enabled).

BUG=b:112154569

Change-Id: I29083ab18e37f929a55b450b143463c67fe0abea
Signed-off-by: Caveh Jalali <caveh@chromium.org>
Reviewed-on: https://review.coreboot.org/28070
Reviewed-by: Furquan Shaikh <furquan@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Caveh Jalali 2018-08-10 16:41:23 -07:00 committed by Patrick Georgi
parent ed365412b2
commit 8cf059ae06
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/poppy/variants/atlas/gpio.c
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@ -215,8 +215,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NC(GPP_E4), PAD_CFG_NC(GPP_E4),
/* E5 : SATA_DEVSLP1 ==> NC */ /* E5 : SATA_DEVSLP1 ==> NC */
PAD_CFG_NC(GPP_E5), PAD_CFG_NC(GPP_E5),
/* E6 : SATA_DEVSLP2 ==> NC */ /* E6 : SATA_DEVSLP2 ==> DISPLAY_DCR_EN */
PAD_CFG_NC(GPP_E6), PAD_CFG_GPO(GPP_E6, 1, DEEP),
/* E7 : CPU_GP1 ==> TOUCHSCREEN_INT_L */ /* E7 : CPU_GP1 ==> TOUCHSCREEN_INT_L */
PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST), PAD_CFG_GPI_APIC(GPP_E7, NONE, PLTRST),
/* E8 : SATALED# ==> NC */ /* E8 : SATALED# ==> NC */