soc/{amd,cavium,mediatek,sifive}: Remove unused <stdlib.h>

Change-Id: I83322e246fe81b97188be17a3fdda16d36df0678
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33688
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/picasso/northbridge.c

@@ -33,7 +33,6 @@
 #include <soc/pci_devs.h>
 #include <soc/iomap.h>
 #include <stdint.h>
-#include <stdlib.h>
 #include <string.h>
 #include <arch/bert_storage.h>
 

src/soc/amd/picasso/sm.c

@@ -20,7 +20,6 @@
 #include <device/smbus.h>
 #include <cpu/x86/lapic.h>
 #include <arch/ioapic.h>
-#include <stdlib.h>
 #include <soc/southbridge.h>
 #include <soc/smbus.h>
 

src/soc/amd/stoneyridge/BiosCallOuts.c

@@ -21,7 +21,6 @@
 #include <console/console.h>
 #include <soc/southbridge.h>
 #include <soc/pci_devs.h>
-#include <stdlib.h>
 #include <amdblocks/agesawrapper.h>
 #include <amdblocks/dimm_spd.h>
 #include <amdblocks/car.h>

src/soc/amd/stoneyridge/northbridge.c

@@ -36,7 +36,6 @@
 #include <soc/pci_devs.h>
 #include <soc/iomap.h>
 #include <stdint.h>
-#include <stdlib.h>
 #include <string.h>
 #include <arch/bert_storage.h>
 

src/soc/amd/stoneyridge/sm.c

@@ -19,7 +19,6 @@
 #include <device/smbus.h>
 #include <cpu/x86/lapic.h>
 #include <arch/ioapic.h>
-#include <stdlib.h>
 #include <soc/southbridge.h>
 #include <soc/smbus.h>
 

src/soc/cavium/cn81xx/cbmem.c

@@ -17,7 +17,6 @@
 #include <cbmem.h>
 #include <soc/addressmap.h>
 #include <soc/sdram.h>
-#include <stdlib.h>
 #include <symbols.h>
 
 void *cbmem_top_chipset(void)

src/soc/cavium/cn81xx/spi.c

@@ -25,7 +25,6 @@
 #include <soc/clock.h>
 #include <spi-generic.h>
 #include <spi_flash.h>
-#include <stdlib.h>
 #include <timer.h>
 
 union cavium_spi_cfg {

src/soc/mediatek/common/ddp.c

@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <edid.h>
-#include <stdlib.h>
 #include <stddef.h>
 #include <soc/addressmap.h>
 #include <soc/ddp.h>

src/soc/mediatek/common/spi.c

@@ -18,7 +18,6 @@
 #include <console/console.h>
 #include <endian.h>
 #include <gpio.h>
-#include <stdlib.h>
 #include <soc/pll.h>
 #include <soc/spi.h>
 #include <timer.h>

src/soc/mediatek/mt8173/ddp.c

@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <edid.h>
-#include <stdlib.h>
 #include <stddef.h>
 #include <soc/addressmap.h>
 #include <soc/ddp.h>

src/soc/mediatek/mt8173/include/soc/gpio.h

@@ -16,7 +16,6 @@
 #define SOC_MEDIATEK_MT8173_GPIO_H
 
 #include <stdint.h>
-#include <stdlib.h>
 #include <soc/addressmap.h>
 #include <soc/gpio_common.h>
 

src/soc/mediatek/mt8183/ddp.c

@@ -15,7 +15,6 @@
 
 #include <device/mmio.h>
 #include <edid.h>
-#include <stdlib.h>
 #include <stddef.h>
 #include <soc/addressmap.h>
 #include <soc/ddp.h>

src/soc/sifive/fu540/clock.c

@@ -17,7 +17,6 @@
 #include <console/console.h>
 #include <soc/clock.h>
 #include <soc/addressmap.h>
-#include <stdlib.h>
 #include <stdint.h>
 
 // 33.33 Mhz after reset