mb/google/dedede: Remove pad termination for RAM_STRAP_4
The stuffed resistor straps are weaker compared to the internal pull-up. This can cause the GPIO to read '1' always. Remove the internal pull-up. Also read the GPIO only on the boards where the board version is populated. BUG=b:154301008 TEST=Build and boot the mainboard. Change-Id: Ib640211b9f50dfb0174a570eda1625bacbebb855 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40531 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
This commit is contained in:
parent
f60a8f02c5
commit
8d09cf6186
|
@ -18,7 +18,7 @@ void mainboard_memory_init_params(FSPM_UPD *memupd)
|
|||
.read_type = READ_SPD_CBFS,
|
||||
.spd_spec.spd_index = variant_memory_sku(),
|
||||
};
|
||||
bool half_populated = !gpio_get(GPIO_MEM_CH_SEL);
|
||||
bool half_populated = variant_mem_is_half_populated();
|
||||
|
||||
memcfg_init(&memupd->FspmConfig, board_cfg, &spd_info, half_populated);
|
||||
}
|
||||
|
|
|
@ -348,7 +348,7 @@ static const struct pad_config gpio_table[] = {
|
|||
|
||||
|
||||
/* S0 : RAM_STRAP_4 */
|
||||
PAD_CFG_GPI(GPP_S0, UP_5K, DEEP),
|
||||
PAD_CFG_GPI(GPP_S0, NONE, DEEP),
|
||||
/* S1 : RSVD_STRAP */
|
||||
PAD_NC(GPP_S1, NONE),
|
||||
/* S2 : DMIC1_CLK */
|
||||
|
@ -418,7 +418,7 @@ static const struct pad_config early_gpio_table[] = {
|
|||
PAD_CFG_GPO(GPP_H19, 0, DEEP),
|
||||
|
||||
/* S0 : RAM_STRAP_4 */
|
||||
PAD_CFG_GPI(GPP_S0, UP_5K, DEEP),
|
||||
PAD_CFG_GPI(GPP_S0, NONE, DEEP),
|
||||
};
|
||||
|
||||
const struct pad_config *__weak variant_gpio_table(size_t *num)
|
||||
|
|
|
@ -33,4 +33,11 @@ const struct mb_cfg *variant_memcfg_config(void);
|
|||
/* Return memory SKU for the variant */
|
||||
int variant_memory_sku(void);
|
||||
|
||||
/**
|
||||
* Get data whether memory channel is half-populated or not
|
||||
*
|
||||
* @return false on boards where memory channel is half-populated, true otherwise.
|
||||
*/
|
||||
bool variant_mem_is_half_populated(void);
|
||||
|
||||
#endif /*__BASEBOARD_VARIANTS_H__ */
|
||||
|
|
|
@ -70,3 +70,8 @@ int __weak variant_memory_sku(void)
|
|||
|
||||
return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));
|
||||
}
|
||||
|
||||
bool __weak variant_mem_is_half_populated(void)
|
||||
{
|
||||
return !gpio_get(GPIO_MEM_CH_SEL);
|
||||
}
|
||||
|
|
|
@ -7,3 +7,5 @@
|
|||
|
||||
SPD_SOURCES = Micron_MT53E512M32D2NP_2GB #0b0000
|
||||
SPD_SOURCES += empty #0b0001
|
||||
|
||||
romstage-y += memory.c
|
||||
|
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0-or-later
|
||||
*/
|
||||
|
||||
#include <baseboard/variants.h>
|
||||
#include <baseboard/gpio.h>
|
||||
#include <ec/google/chromeec/ec.h>
|
||||
#include <gpio.h>
|
||||
|
||||
bool variant_mem_is_half_populated(void)
|
||||
{
|
||||
uint32_t board_ver;
|
||||
|
||||
/* On boards where board version is populated, ram strap is also populated */
|
||||
if (!google_chromeec_get_board_version(&board_ver))
|
||||
return !gpio_get(GPIO_MEM_CH_SEL);
|
||||
|
||||
return false;
|
||||
}
|
|
@ -7,3 +7,5 @@
|
|||
|
||||
SPD_SOURCES = empty #0b0000
|
||||
SPD_SOURCES += Micron_MT53E512M32D2NP_2GB #0b0001
|
||||
|
||||
romstage-y += memory.c
|
||||
|
|
|
@ -0,0 +1,22 @@
|
|||
/*
|
||||
* This file is part of the coreboot project.
|
||||
*
|
||||
*
|
||||
* SPDX-License-Identifier: GPL-2.0-or-later
|
||||
*/
|
||||
|
||||
#include <baseboard/variants.h>
|
||||
#include <baseboard/gpio.h>
|
||||
#include <ec/google/chromeec/ec.h>
|
||||
#include <gpio.h>
|
||||
|
||||
bool variant_mem_is_half_populated(void)
|
||||
{
|
||||
uint32_t board_ver;
|
||||
|
||||
/* On boards where board version is populated, ram strap is also populated */
|
||||
if (!google_chromeec_get_board_version(&board_ver))
|
||||
return !gpio_get(GPIO_MEM_CH_SEL);
|
||||
|
||||
return false;
|
||||
}
|
Loading…
Reference in New Issue