X60: use EC events 0x50/0x58 instead of GPIO GPE for Docking/Undocking
Change-Id: I674e5166f5fb7ba299e6f1231f30434a5bf731c5 Signed-off-by: Sven Schnelle <svens@stackframe.org> Reviewed-on: http://review.coreboot.org/161 Tested-by: build bot (Jenkins)
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@ -39,7 +39,6 @@ Scope (\_SB)
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Method(_DCK, 1, NotSerialized)
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{
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if (Arg0) {
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Sleep(250)
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/* connect dock */
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TRAP(SMI_DOCK_CONNECT)
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} else {
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@ -53,7 +52,7 @@ Scope (\_SB)
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Method(_STA, 0, NotSerialized)
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{
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Return (DSTA)
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Return (DSTA)
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}
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}
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}
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@ -64,4 +63,15 @@ Scope(\_SB.PCI0.LPCB.EC)
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{
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Notify(\_SB.DOCK, 3)
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}
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Method(_Q50, 0, NotSerialized)
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{
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Notify(\_SB.DOCK, 3)
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}
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Method(_Q58, 0, NotSerialized)
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{
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Notify(\_SB.DOCK, 0)
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}
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}
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@ -27,16 +27,4 @@ Scope (\_GPE)
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/* Read EC register to clear wake status */
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Store(\_SB.PCI0.LPCB.EC.WAKE, Local0)
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}
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/* SLICE_ON_3M GPE (Dock status) */
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Method(_L1D, 0, NotSerialized)
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{
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if (GP13) {
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Or(GIV1, 0x20, GIV1)
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Notify(\_SB.DOCK, 3)
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} else {
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And(GIV1, 0xdf, GIV1)
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Notify(\_SB.DOCK, 0)
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}
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}
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}
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@ -86,6 +86,7 @@ chip northbridge/intel/i945
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device pnp ff.1 on # dummy
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end
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register "backlight_enable" = "0x01"
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register "dock_event_enable" = "0x01"
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end
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chip ec/lenovo/h8
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device pnp ff.2 on # dummy
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@ -98,7 +99,7 @@ chip northbridge/intel/i945
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register "config0" = "0xa6"
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register "config1" = "0x05"
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register "config2" = "0xa0"
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register "config3" = "0x05"
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register "config3" = "0x01"
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register "beepmask0" = "0xfe"
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register "beepmask1" = "0x96"
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@ -107,7 +108,15 @@ chip northbridge/intel/i945
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register "event3_enable" = "0xff"
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register "event4_enable" = "0xf4"
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register "event5_enable" = "0x3c"
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register "event6_enable" = "0x80"
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register "event7_enable" = "0x01"
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register "eventc_enable" = "0x3c"
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register "event8_enable" = "0x01"
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register "event9_enable" = "0xff"
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register "eventa_enable" = "0xff"
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register "eventb_enable" = "0xff"
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register "eventc_enable" = "0xff"
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register "eventd_enable" = "0xff"
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register "wlan_enable" = "0x01"
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register "trackpoint_enable" = "0x03"
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@ -132,10 +132,12 @@ int dock_connect(void)
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/* Assert D_PLTRST# */
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outb(0xfe, 0x1680);
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udelay(1000);
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udelay(100000);
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/* Deassert D_PLTRST# */
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outb(0xff, 0x1680);
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udelay(1000);
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/* startup 14.318MHz Clock */
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dock_write_register(0x29, 0x06);
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/* wait until clock is settled */
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@ -232,11 +234,17 @@ int dock_connect(void)
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/* Enable USB and Ultrabay power */
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outb(0x03, 0x1628);
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dock_write_register(0x07, 0x03);
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dock_write_register(0x30, 0x01);
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console_init();
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return 0;
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}
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void dock_disconnect(void)
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{
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/* disable Ultrabay and USB Power */
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outb(0x00, 0x1628);
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/* disconnect LPC bus */
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outb(0x00, 0x164c);
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/* Assert PLTRST and DLPCPD */
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@ -45,6 +45,12 @@ static void mainboard_enable(device_t dev)
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/* enable Audio */
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h8_set_audio_mute(0);
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ec_clr_bit(0x03, 2);
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if (inb(0x164c) & 0x08) {
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ec_set_bit(0x03, 2);
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ec_write(0x0c, 0x88);
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}
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/* If we're resuming from suspend, blink suspend LED */
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dev0 = dev_find_slot(0, PCI_DEVFN(0,0));
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if (dev0 && pci_read_config32(dev0, SKPAD) == SKPAD_ACPI_S3_MAGIC)
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@ -71,19 +71,23 @@ int mainboard_io_trap_handler(int smif)
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switch (smif) {
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case SMI_DOCK_CONNECT:
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ec_clr_bit(0x03, 2);
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dlpc_init();
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if (!dock_connect()) {
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if (!dlpc_init() && !dock_connect()) {
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ec_set_bit(0x03, 2);
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/* set dock LED to indicate status */
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ec_write(0x0c, 0x09);
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ec_write(0x0c, 0x88);
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} else {
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/* blink dock LED to indicate failure */
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ec_write(0x0c, 0xc8);
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ec_write(0x0c, 0x08);
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ec_write(0x0c, 0xc9);
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}
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break;
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case SMI_DOCK_DISCONNECT:
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ec_clr_bit(0x03, 2);
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dock_disconnect();
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ec_write(0x0c, 0x08);
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break;
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case SMI_SAVE_CMOS:
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@ -136,6 +140,19 @@ static void mainboard_smi_handle_ec_sci(void)
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mainboard_smi_brightness_down();
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mainboard_smi_save_cmos();
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break;
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/* Fn-F9 key */
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case 0x18:
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/* Power loss */
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case 0x27:
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/* Undock Key */
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case 0x50:
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mainboard_io_trap_handler(SMI_DOCK_DISCONNECT);
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break;
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/* Dock Event */
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case 0x37:
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case 0x58:
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mainboard_io_trap_handler(SMI_DOCK_CONNECT);
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break;
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default:
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break;
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}
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