mainboard/google/nocturne: Update GPIO_FCAM_PWR_EN

The FCAM_PWR_EN gpio should be GPP_B4 according to the latest board
schematics.

Change-Id: Id926bd224b3392d8a61b6d8ae0509053afaa5b9e
Signed-off-by: Ricky Liang <jcliang@chromium.org>
Reviewed-on: https://review.coreboot.org/27433
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Tomasz Figa <tfiga@google.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
This commit is contained in:
Ricky Liang 2018-07-11 17:07:31 +08:00 committed by Furquan Shaikh
parent ded0c77d48
commit 8d0fd5d7d3
2 changed files with 3 additions and 3 deletions

View File

@ -177,8 +177,8 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NC(GPP_D6),
/* D7 : ISH_I2C1_SDA ==> RCAM_PWR_EN */
PAD_CFG_GPO(GPP_D7, 0, DEEP),
/* D8 : ISH_I2C1_SCL ==> FCAM_PWR_EN */
PAD_CFG_GPO(GPP_D8, 0, DEEP),
/* D8 : ISH_I2C1_SCL ==> NC */
PAD_CFG_NC(GPP_D8),
/* D9 : ISH_SPI_CS# ==> PCH_SR1_INT_L */
PAD_CFG_GPI_APIC(GPP_D9, NONE, DEEP),
/* D10 : ISH_SPI_CLK ==> PCH_SR0_INT_L */

View File

@ -41,7 +41,7 @@
#define GPIO_RCAM_PWR_EN GPP_D7
#define GPIO_PCH_RCAM_CLK_EN GPP_D14
#define GPIO_RCAM_RST_L GPP_D16
#define GPIO_FCAM_PWR_EN GPP_D8
#define GPIO_FCAM_PWR_EN GPP_B4
#define GPIO_PCH_FCAM_CLK_EN GPP_D13
#define GPIO_FCAM_RST_L GPP_D15