util/inteltool: Add ADL-S device identifications

R680E, Q670E, H610E are the ADL-S IoT variants

see also:
commit a0bc90e4ab ("Add missing ADL-S device identification")

Signed-off-by: Maximilian Brune <maximilian.brune@9elements.com>
Change-Id: I1dbfa0464bc22f9bcf91d9e9fa9eb79132600175
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
This commit is contained in:
Maximilian Brune 2022-08-08 12:55:57 +02:00 committed by Lean Sheng Tan
parent b07209ff88
commit 8d1051f4aa
5 changed files with 15 additions and 0 deletions

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@ -1100,6 +1100,9 @@ int print_gpios(struct pci_dev *sb, int show_all, int show_diffs)
case PCI_DEVICE_ID_INTEL_C256:
case PCI_DEVICE_ID_INTEL_W580:
case PCI_DEVICE_ID_INTEL_ICELAKE_LP_U:
case PCI_DEVICE_ID_INTEL_H610E:
case PCI_DEVICE_ID_INTEL_Q670E:
case PCI_DEVICE_ID_INTEL_R680E:
case PCI_DEVICE_ID_INTEL_H610:
case PCI_DEVICE_ID_INTEL_B660:
case PCI_DEVICE_ID_INTEL_H670:

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@ -213,6 +213,9 @@ const struct gpio_community *const *get_gpio_communities(struct pci_dev *const s
*community_count = ARRAY_SIZE(tigerlake_pch_h_communities);
*pad_stepping = 16;
return tigerlake_pch_h_communities;
case PCI_DEVICE_ID_INTEL_H610E:
case PCI_DEVICE_ID_INTEL_Q670E:
case PCI_DEVICE_ID_INTEL_R680E:
case PCI_DEVICE_ID_INTEL_H610:
case PCI_DEVICE_ID_INTEL_B660:
case PCI_DEVICE_ID_INTEL_H670:

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@ -393,6 +393,9 @@ static const struct {
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_HM570, "HM570" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_QM580, "QM580" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_WM590, "WM590" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H610E, "H610E" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_Q670E, "Q670E" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_R680E, "R680E" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H610, "H610" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_B660, "B660" },
{ PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_H670, "H670" },

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@ -223,6 +223,9 @@ static inline uint32_t inl(unsigned port)
#define PCI_DEVICE_ID_INTEL_C256 0x438d
#define PCI_DEVICE_ID_INTEL_W580 0x438f
#define PCI_DEVICE_ID_INTEL_H610E 0x7a92
#define PCI_DEVICE_ID_INTEL_Q670E 0x7a91
#define PCI_DEVICE_ID_INTEL_R680E 0x7a90
#define PCI_DEVICE_ID_INTEL_H610 0x7a87
#define PCI_DEVICE_ID_INTEL_B660 0x7a86
#define PCI_DEVICE_ID_INTEL_H670 0x7a85

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@ -159,6 +159,9 @@ void pcr_init(struct pci_dev *const sb)
sbbar_phys = 0xfd000000;
use_p2sb = false;
break;
case PCI_DEVICE_ID_INTEL_H610E:
case PCI_DEVICE_ID_INTEL_Q670E:
case PCI_DEVICE_ID_INTEL_R680E:
case PCI_DEVICE_ID_INTEL_H610:
case PCI_DEVICE_ID_INTEL_B660:
case PCI_DEVICE_ID_INTEL_H670: