GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

mb/google/dedede/var/taranza: Add more USB configuration 

- remove usb2_ports[5] since taranza doesn't have PL2303.
- add usb2_ports[6] and usb3_ports[1] for Type-A Port A4.

BUG=b:288094807, b:278167978
TEST=emerge-dedede coreboot chromeos-bootimage
     verified all the USB port works

Signed-off-by: Sheng-Liang Pan <sheng-liang.pan@quanta.corp-partner.google.com>
Change-Id: I7b411c21271497ba386143140aa8cfbb17a1a111
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76186
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sheng-Liang Pan 2023-06-30 17:41:13 +08:00 committed by Eric Lai
parent d44e08ad9f
commit 8d16a14367
1 changed files with 23 additions and 7 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
src/mainboard/google/dedede/variants/taranza/overridetree.cb
View File

@ -97,9 +97,16 @@ chip soc/intel/jasperlake
.pre_emp_bias = USB2_BIAS_11P25MV,
.pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
}" # Type-A Port A3
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # PL2303
register "usb2_ports[6]" = "{
.enable = 1,
.ocpin = OC_SKIP,
.tx_bias = USB2_BIAS_0MV,
.tx_emp_enable = USB2_PRE_EMP_ON,
.pre_emp_bias = USB2_BIAS_11P25MV,
.pre_emp_bit = USB2_HALF_BIT_PRE_EMP,
}" # Type-A Port A4
register "usb3_ports[1]" = "USB3_PORT_EMPTY" # No USB3/2 Type-C Port C1
register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A4
register "usb3_ports[4]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A2
register "usb3_ports[5]" = "USB3_PORT_DEFAULT(OC_SKIP)" # USB3/1 Type-A Port A3
@ -188,6 +195,12 @@ chip soc/intel/jasperlake
register "group" = "ACPI_PLD_GROUP(1, 5)"
device usb 2.4 on end
end
chip drivers/usb/acpi
register "desc" = ""USB2 Type-A Port A4""
register "type" = "UPC_TYPE_A"
register "group" = "ACPI_PLD_GROUP(1, 6)"
device usb 2.5 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-C Port C0""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
@ -195,30 +208,33 @@ chip soc/intel/jasperlake
device usb 3.0 on end
end
chip drivers/usb/acpi
device usb 3.1 off end
register "desc" = ""USB3 Type-A Port A4""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(1, 2)"
device usb 3.1 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A0""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(1, 2)"
register "group" = "ACPI_PLD_GROUP(1, 3)"
device usb 3.2 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A1""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(1, 3)"
register "group" = "ACPI_PLD_GROUP(1, 4)"
device usb 3.3 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A2""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(1, 4)"
register "group" = "ACPI_PLD_GROUP(1, 5)"
device usb 3.4 on end
end
chip drivers/usb/acpi
register "desc" = ""USB3 Type-A Port A3""
register "type" = "UPC_TYPE_USB3_A"
register "group" = "ACPI_PLD_GROUP(1, 5)"
register "group" = "ACPI_PLD_GROUP(1, 6)"
device usb 3.5 on end
end
end