GNUBoot
/
coreboot-kgpe-d16
2
0
Fork 0
Code Issues Pull Requests Packages Projects Releases Wiki Activity

soc/amd: Remove Kconfig X86_RESET_VECTOR 

The architectural requirement is for the address to be
located at the end of bootblock -0x10 bytes, so the
definition was redundant with other Kconfig variables.

Change-Id: Ia014470cfadf0b401a12a2de6dce3b1fc1862137
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48405
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
This commit is contained in:
Kyösti Mälkki 2020-12-04 19:51:17 +02:00 committed by Felix Held
parent 8dcd62d705
commit 8d187f4d22
3 changed files with 3 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

9
src/soc/amd/cezanne/Kconfig
View File

@ -61,15 +61,6 @@ config C_ENV_BOOTBLOCK_SIZE
This variable controls the DRAM allocation size in linker script This variable controls the DRAM allocation size in linker script
for bootblock stage. for bootblock stage.
config X86_RESET_VECTOR
hex
depends on ARCH_X86
default 0x203fff0
help
Sets the reset vector within bootblock where x86 starts execution.
Reset vector is supposed to live at offset -0x10 from end of
bootblock i.e. BOOTBLOCK_ADDR + C_ENV_BOOTBLOCK_SIZE - 0x10.
config ROMSTAGE_ADDR config ROMSTAGE_ADDR
hex hex
default 0x2040000 default 0x2040000

6
src/soc/amd/common/block/cpu/noncar/memlayout_x86.ld
View File

@ -84,7 +84,6 @@ SECTIONS
#if CONFIG(VBOOT) #if CONFIG(VBOOT)
PSP_SHAREDMEM_DRAM_END(CONFIG_PSP_SHAREDMEM_BASE + CONFIG_PSP_SHAREDMEM_SIZE) PSP_SHAREDMEM_DRAM_END(CONFIG_PSP_SHAREDMEM_BASE + CONFIG_PSP_SHAREDMEM_SIZE)
#endif #endif
_ = ASSERT((CONFIG_BOOTBLOCK_ADDR + CONFIG_C_ENV_BOOTBLOCK_SIZE - 0x10) == CONFIG_X86_RESET_VECTOR, "Reset vector should be -0x10 from end of bootblock");
_ = ASSERT(CONFIG_BOOTBLOCK_ADDR == ((CONFIG_BOOTBLOCK_ADDR + 0xFFFF) & 0xFFFF0000), "Bootblock must be 16 bit aligned"); _ = ASSERT(CONFIG_BOOTBLOCK_ADDR == ((CONFIG_BOOTBLOCK_ADDR + 0xFFFF) & 0xFFFF0000), "Bootblock must be 16 bit aligned");
BOOTBLOCK(CONFIG_BOOTBLOCK_ADDR, CONFIG_C_ENV_BOOTBLOCK_SIZE) BOOTBLOCK(CONFIG_BOOTBLOCK_ADDR, CONFIG_C_ENV_BOOTBLOCK_SIZE)
ROMSTAGE(CONFIG_ROMSTAGE_ADDR, CONFIG_ROMSTAGE_SIZE) ROMSTAGE(CONFIG_ROMSTAGE_ADDR, CONFIG_ROMSTAGE_SIZE)
@ -105,10 +104,11 @@ nullidt_offset = nullidt & 0xffff;
SECTIONS { SECTIONS {
/* Trigger an error if I have an unusable start address */ /* Trigger an error if I have an unusable start address */
_TOO_LOW = CONFIG_X86_RESET_VECTOR - 0xfff0; _TOO_LOW = _X86_RESET_VECTOR - 0xfff0;
_bogus = ASSERT(_start16bit >= _TOO_LOW, "_start16bit too low. Please report."); _bogus = ASSERT(_start16bit >= _TOO_LOW, "_start16bit too low. Please report.");
. = CONFIG_X86_RESET_VECTOR; . = CONFIG_BOOTBLOCK_ADDR + CONFIG_C_ENV_BOOTBLOCK_SIZE - 0x10;
_X86_RESET_VECTOR = .;
.reset . : { .reset . : {
*(.reset); *(.reset);
. = 15; . = 15;

9
src/soc/amd/picasso/Kconfig
View File

@ -134,15 +134,6 @@ config C_ENV_BOOTBLOCK_SIZE
This variable controls the DRAM allocation size in linker script This variable controls the DRAM allocation size in linker script
for bootblock stage. for bootblock stage.
config X86_RESET_VECTOR
hex
depends on ARCH_X86
default 0x203fff0
help
Sets the reset vector within bootblock where x86 starts execution.
Reset vector is supposed to live at offset -0x10 from end of
bootblock i.e. BOOTBLOCK_ADDR + C_ENV_BOOTBLOCK_SIZE - 0x10.
config ROMSTAGE_ADDR config ROMSTAGE_ADDR
hex hex
default 0x2040000 default 0x2040000