mb/google/brya/var/marasov: Update devicetree setting for marasov
update devicetree setting per the schematic BUG=b:254365935 BRANCH=None TEST=Built successfully Signed-off-by: Frank Chu <Frank_Chu@pegatron.corp-partner.google.com> Change-Id: Ifa4cb18b8e1a7b162f505ff12612ef808fb7061a Reviewed-on: https://review.coreboot.org/c/coreboot/+/69364 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Frank Chu <frank_chu@pegatron.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Frank Chu
Felix Held
parent
961e09c631
commit
8d4cb09048
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@ -1,6 +1,246 @@
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fw_config
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field KB_BL 7 7
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option KB_BL_ABSENT 0
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option KB_BL_PRESENT 1
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end
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field AUDIO 8 10
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option AUDIO_UNKNOWN 0
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option ALC1019_ALC5682I_VD_I2S 1
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option ALC1019_ALC5682I_VS_I2S 2
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end
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field THERMAL 18 18
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option THERMAL_6W 0
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option THERMAL_15W 1
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end
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field STORAGE 30 31
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option STORAGE_NVME 0
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option STORAGE_UFS 1
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end
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end
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chip soc/intel/alderlake
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device domain 0 on
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end
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# Intel Common SoC Config
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#+-------------------+---------------------------+
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#| Field | Value |
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#+-------------------+---------------------------+
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#| GSPI1 | Fingerprint MCU |
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#| I2C0 | Audio |
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#| I2C1 | cr50 TPM. Early init is |
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#| | required to set up a BAR |
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#| | for TPM communication |
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#| I2C3 | TouchScreen |
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#| I2C5 | Trackpad |
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#+-------------------+---------------------------+
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register "common_soc_config" = "{
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.i2c[0] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[1] = {
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.early_init = 1,
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.speed = I2C_SPEED_FAST,
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},
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.i2c[3] = {
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.speed = I2C_SPEED_FAST,
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},
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.i2c[5] = {
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.speed = I2C_SPEED_FAST,
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},
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}"
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register "sagv" = "SaGv_Enabled"
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register "serial_io_i2c_mode" = "{
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[PchSerialIoIndexI2C2] = PchSerialIoDisabled,
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}"
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register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" # USB2_C0
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register "usb2_ports[1]" = "USB2_PORT_EMPTY" # Disable USB2_Port 1
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register "usb2_ports[2]" = "USB2_PORT_TYPE_C(OC1)" # USB2_C2
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register "usb2_ports[3]" = "USB2_PORT_MID(OC2)" # Type-A Port A1
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register "usb2_ports[4]" = "USB2_PORT_EMPTY" # Disable USB2 Port 4
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register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Camera
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register "usb2_ports[6]" = "USB2_PORT_EMPTY" # Disable USB2 Port 6
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register "usb2_ports[7]" = "USB2_PORT_MID(OC_SKIP)" # DCI port
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register "usb2_ports[8]" = "USB2_PORT_MID(OC3)" # Type-A Port A0
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register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)" # M.2 Bluetooth
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register "usb3_ports[0]" = "USB3_PORT_DEFAULT(OC3)" # USB3/2 Type A port A0
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register "usb3_ports[1]" = "USB3_PORT_DEFAULT(OC_SKIP)" # DCI port
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register "usb3_ports[2]" = "USB3_PORT_EMPTY" # Disable USB3 Port 2
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register "usb3_ports[3]" = "USB3_PORT_DEFAULT(OC2)" # USB3/2 Type A port A1
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register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC0)"
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register "tcss_ports[1]" = "TCSS_PORT_EMPTY"
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register "tcss_ports[2]" = "TCSS_PORT_DEFAULT(OC1)"
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device domain 0 on
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device ref i2c0 on
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chip drivers/i2c/generic
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register "hid" = ""10EC5682""
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register "name" = ""RT58""
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register "desc" = ""Headset Codec""
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
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# Set the jd_src to RT5668_JD1 for jack detection
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register "property_count" = "1"
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register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
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register "property_list[0].name" = ""realtek,jd-src""
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register "property_list[0].integer" = "1"
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device i2c 1a on
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probe AUDIO AUDIO_UNKNOWN
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probe AUDIO ALC1019_ALC5682I_VD_I2S
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end
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end
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chip drivers/i2c/generic
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register "hid" = ""RTL5682""
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register "name" = ""RT58""
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register "desc" = ""Headset Codec""
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register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_BOTH(GPP_A23)"
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# Set the jd_src to RT5668_JD1 for jack detection
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register "property_count" = "1"
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register "property_list[0].type" = "ACPI_DP_TYPE_INTEGER"
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register "property_list[0].name" = ""realtek,jd-src""
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register "property_list[0].integer" = "1"
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device i2c 1a on
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probe AUDIO ALC1019_ALC5682I_VS_I2S
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end
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end
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chip drivers/generic/alc1015
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register "hid" = ""RTL1019""
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register "sdb" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_A11)"
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device generic 1 on end
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end
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end #I2C0
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device ref i2c1 on
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chip drivers/i2c/tpm
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register "hid" = ""GOOG0005""
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register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_A13_IRQ)"
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device i2c 50 on end
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end
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end #I2C1
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device ref pcie_rp11 on
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# Enable NVMe SSD PCIe 11-12 using clk 1
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register "pch_pcie_rp[PCH_RP(11)]" = "{
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.clk_src = 1,
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.clk_req = 1,
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.flags = PCIE_RP_LTR | PCIE_RP_AER,
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}"
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probe STORAGE STORAGE_NVME
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end
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device ref ish on
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probe STORAGE STORAGE_UFS
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end
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device ref ufs on
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probe STORAGE STORAGE_UFS
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end
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device ref gspi1 on
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chip drivers/spi/acpi
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register "name" = ""CRFP""
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register "hid" = "ACPI_DT_NAMESPACE_HID"
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register "uid" = "1"
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register "compat_string" = ""google,cros-ec-spi""
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register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_F15_IRQ)"
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register "wake" = "GPE0_DW2_15"
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register "has_power_resource" = "1"
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register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D1)"
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register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_D2)"
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register "enable_delay_ms" = "3"
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device spi 0 on end
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end # FPMCU
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end
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device ref pmc hidden
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chip drivers/intel/pmc_mux
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device generic 0 on
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chip drivers/intel/pmc_mux/conn
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use usb2_port1 as usb2_port
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use tcss_usb3_port1 as usb3_port
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device generic 0 alias conn0 on end
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end
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chip drivers/intel/pmc_mux/conn
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use usb2_port3 as usb2_port
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use tcss_usb3_port3 as usb3_port
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device generic 2 alias conn2 on end
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end
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end
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end
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end
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device ref tcss_xhci on
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chip drivers/usb/acpi
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device ref tcss_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
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device ref tcss_usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-C Port C2 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
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device ref tcss_usb3_port3 on end
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end
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end
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end
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end
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device ref xhci on
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chip drivers/usb/acpi
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device ref xhci_root_hub on
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C0 (MLB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 1))"
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device ref usb2_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-C Port C2 (DB)""
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register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_C(LEFT, LEFT, ACPI_PLD_GROUP(3, 1))"
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device ref usb2_port3 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port A1 (MLB)""
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register "type" = "UPC_TYPE_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 2))"
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device ref usb2_port4 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Camera""
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register "type" = "UPC_TYPE_INTERNAL"
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device ref usb2_port6 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Type-A Port A0 (MLB)""
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register "type" = "UPC_TYPE_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
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device ref usb2_port9 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB2 Bluetooth""
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register "type" = "UPC_TYPE_INTERNAL"
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register "reset_gpio" =
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"ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D4)"
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device ref usb2_port10 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port A0 (MLB)""
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register "type" = "UPC_TYPE_USB3_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(1, 2))"
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device ref usb3_port1 on end
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end
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chip drivers/usb/acpi
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register "desc" = ""USB3 Type-A Port A1 (MLB)""
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register "type" = "UPC_TYPE_USB3_A"
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register "use_custom_pld" = "true"
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register "custom_pld" = "ACPI_PLD_TYPE_A(RIGHT, RIGHT, ACPI_PLD_GROUP(2, 2))"
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device ref usb3_port4 on end
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end
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end
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end
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end
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end
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end
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