changes to support new ppc arch

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Greg Watson 2005-10-20 01:44:21 +00:00
parent 58cb0bf1df
commit 8d4edc2fcd
9 changed files with 79 additions and 47 deletions

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@ -6,4 +6,5 @@
* happens prior to entry into hardwaremain().
*/
extern void board_init(void);
extern void board_init2(void);
#endif /* _BOARD_H */

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@ -30,3 +30,15 @@
#define HID0_SGE 0x00000080
#define HID0_BTIC 0x00000020
#define HID0_BHT 0x00000004
/*----------------------------------------------------------------------------+
| Machine State Register. MSR_EE, MSR_PR, MSR_FP, MSR_ME, MSR_FE0, MSR_FE1,
+----------------------------------------------------------------------------*/
#define MSR_APE 0x00080000 /* wait state enable */
#define MSR_WE 0x00040000 /* wait state enable */
#define MSR_CE 0x00020000 /* critical interrupt enable */
#define MSR_DWE 0x00000400 /* debug wait enable */
#define MSR_DE 0x00000200 /* debug interrupt enable */
#define MSR_IR 0x00000020 /* instruction relocale */
#define MSR_DR 0x00000010 /* data relocale */

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@ -31,3 +31,14 @@
#define HID0_BTIC 0x00000020
#define HID0_BHT 0x00000004
/*----------------------------------------------------------------------------+
| Machine State Register. MSR_EE, MSR_PR, MSR_FP, MSR_ME, MSR_FE0, MSR_FE1,
+----------------------------------------------------------------------------*/
#define MSR_APE 0x00080000 /* wait state enable */
#define MSR_WE 0x00040000 /* wait state enable */
#define MSR_CE 0x00020000 /* critical interrupt enable */
#define MSR_DWE 0x00000400 /* debug wait enable */
#define MSR_DE 0x00000200 /* debug interrupt enable */
#define MSR_IR 0x00000020 /* instruction relocale */
#define MSR_DR 0x00000010 /* data relocale */

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@ -5,5 +5,5 @@
* Provided for all PPC boards to do SDRAM initialization. This
* happens prior to entry into hardwaremain().
*/
extern void sdram_init(void);
extern void memory_init(void);
#endif /* _SDRAM_H */

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@ -1,10 +1,10 @@
object c_start.S
object setup.o
object pci_ppc_conf1_ops.o
object pci_dev.o
object timer.o
object cpuid.o
object cpu.o
object ppc.o
object timebase.S
object floats.S
object div64.S
@ -12,6 +12,6 @@ initobject pci_dev.o
initobject printk_init.o
initobject timebase.S
initobject timer.o
initobject setup.o
initobject floats.S
initobject div64.S
initobject ppc.o

49
src/arch/ppc/lib/ppc.c Normal file
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@ -0,0 +1,49 @@
/* Copyright 2000 AG Electronics Ltd. */
/* This code is distributed without warranty under the GPL v2 (see COPYING) */
#include "ppc.h"
#include "ppcreg.h"
unsigned ppc_getmsr(void)
{
unsigned result;
__asm__ volatile ("mfmsr %0" : "=r" (result));
return result;
}
unsigned ppc_gethid0(void)
{
unsigned result;
__asm__ volatile ("mfspr %0,1008" : "=r" (result));
return result;
}
unsigned ppc_gethid1(void)
{
unsigned result;
__asm__ volatile ("mfspr %0,1009" : "=r" (result));
return result;
}
void ppc_sethid0(unsigned value)
{
__asm__ volatile ("mtspr 1008,%0" : : "r" (value));
}
unsigned ppc_getpvr(void)
{
unsigned result;
__asm__("mfspr %0, 287" : "=r" (result));
return result;
}
void ppc_setmsr(unsigned value)
{
__asm__ volatile ("mtmsr %0; sync" :: "r" (value));
}
void ppc_set1015(unsigned value)
{
__asm__ volatile ("mtspr 1015,%0" : : "r" (value));
}

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@ -56,7 +56,7 @@ static void pci_domain_set_resources(device_t dev)
memstart1 = pci_read_config32(mc_dev, 0x80);
memstart2 = pci_read_config32(mc_dev, 0x84);
extmemstart1 = pci_read_config32(mc_dev, 0x88);
extmemstart1 = pci_read_config32(mc_dev, 0x8c);
extmemstart2 = pci_read_config32(mc_dev, 0x8c);
memend1 = pci_read_config32(mc_dev, 0x90);
memend2 = pci_read_config32(mc_dev, 0x94);
extmemend1 = pci_read_config32(mc_dev, 0x98);

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@ -12,3 +12,4 @@ dir /northbridge/motrola/mpc107
## Build the objects we have code for in this directory.
##
object mpc7410.o
object setup.o

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@ -3,49 +3,7 @@
#include "ppc.h"
#include "ppcreg.h"
unsigned ppc_getmsr(void)
{
unsigned result;
__asm__ volatile ("mfmsr %0" : "=r" (result));
return result;
}
unsigned ppc_gethid0(void)
{
unsigned result;
__asm__ volatile ("mfspr %0,1008" : "=r" (result));
return result;
}
unsigned ppc_gethid1(void)
{
unsigned result;
__asm__ volatile ("mfspr %0,1009" : "=r" (result));
return result;
}
void ppc_sethid0(unsigned value)
{
__asm__ volatile ("mtspr 1008,%0" : : "r" (value));
}
unsigned ppc_getpvr(void)
{
unsigned result;
__asm__("mfspr %0, 287" : "=r" (result));
return result;
}
void ppc_setmsr(unsigned value)
{
__asm__ volatile ("mtmsr %0; sync" :: "r" (value));
}
void ppc_set1015(unsigned value)
{
__asm__ volatile ("mtspr 1015,%0" : : "r" (value));
}
#include "ppc74xx.h"
extern void ppc_init_float_registers(const double *);
/*RODATA static const double dummy_float = 1.0;*/