soc/mediatek/mt8183: Allow modifying vdram1 voltage
DRAM DVFS needs to be calibrated with different vdram1 voltages to get correct parameters. A new API is added to allow changing vdram1 voltage. BUG=b:80501386 BRANCH=none TEST=measure vdram1 voltage with multimeter Change-Id: Ia15ab3a2e1668e5b4873d317b57a38ebee037709 Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33186 Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -29,6 +29,9 @@ enum {
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PMIC_VCORE_DBG0 = 0x149e,
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PMIC_VCORE_VOSEL = 0x14aa,
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PMIC_VDRAM1_VOSEL_SLEEP = 0x160a,
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PMIC_VDRAM1_OP_EN = 0x1610,
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PMIC_VDRAM1_DBG0 = 0x161e,
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PMIC_VDRAM1_VOSEL = 0x1626,
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PMIC_SMPS_ANA_CON0 = 0x1808,
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PMIC_VSIM2_ANA_CON0 = 0x1e30,
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};
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@ -46,5 +49,7 @@ void pmic_set_vsim2_cali(unsigned int vsim2_mv);
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void pmic_init_scp_voltage(void);
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unsigned int pmic_get_vcore_vol(void);
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void pmic_set_vcore_vol(unsigned int vcore_uv);
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unsigned int pmic_get_vdram1_vol(void);
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void pmic_set_vdram1_vol(unsigned int vdram_uv);
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#endif /* __SOC_MEDIATEK_MT6358_H__ */
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@ -826,6 +826,27 @@ void pmic_set_vcore_vol(unsigned int vcore_uv)
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pwrap_write_field(PMIC_VCORE_VOSEL, vol_reg, 0x7F, 0);
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}
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unsigned int pmic_get_vdram1_vol(void)
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{
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unsigned int vol_reg;
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vol_reg = pwrap_read_field(PMIC_VDRAM1_DBG0, 0x7F, 0);
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return 500000 + vol_reg * 12500;
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}
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void pmic_set_vdram1_vol(unsigned int vdram_uv)
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{
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unsigned int vol_reg;
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assert(vdram_uv >= 500000);
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assert(vdram_uv <= 1300000);
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vol_reg = (vdram_uv - 500000) / 12500;
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pwrap_write_field(PMIC_VDRAM1_OP_EN, 1, 0x7F, 0);
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pwrap_write_field(PMIC_VDRAM1_VOSEL, vol_reg, 0x7F, 0);
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}
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static void pmic_wdt_set(void)
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{
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/* [5]=1, RG_WDTRSTB_DEB */
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