mb/asus/p8h61-m*: Drop unnecessary PCH config
The generic PCH code already sets up a superset of these decodings. Change-Id: I90bca37c46b89c35f323225fc3c087f1630397e4 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36887 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tristan Corrick <tristan@corrick.kiwi> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
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@ -42,12 +42,6 @@ const struct southbridge_usb_port mainboard_usb_ports[] = {
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{ 1, 0, 6 },
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{ 1, 0, 6 },
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};
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};
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void mainboard_pch_lpc_setup(void)
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{
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pci_or_config16(PCH_LPC_DEV, LPC_EN,
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CNF1_LPC_EN | KBC_LPC_EN | LPT_LPC_EN | COMA_LPC_EN);
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}
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void bootblock_mainboard_early_init(void)
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void bootblock_mainboard_early_init(void)
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{
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{
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nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE);
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@ -26,13 +26,6 @@
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#define SERIAL_DEV PNP_DEV(0x2e, NCT6776_SP1)
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#define SERIAL_DEV PNP_DEV(0x2e, NCT6776_SP1)
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#define ACPI_DEV PNP_DEV(0x2e, NCT6776_ACPI)
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#define ACPI_DEV PNP_DEV(0x2e, NCT6776_ACPI)
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void mainboard_pch_lpc_setup(void)
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{
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/* Enable the Super IO */
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pci_write_config16(PCH_LPC_DEV, LPC_EN, CNF1_LPC_EN |
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KBC_LPC_EN | LPT_LPC_EN | COMA_LPC_EN);
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}
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const struct southbridge_usb_port mainboard_usb_ports[] = {
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const struct southbridge_usb_port mainboard_usb_ports[] = {
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{ 1, 0, 0 },
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{ 1, 0, 0 },
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{ 1, 0, 0 },
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{ 1, 0, 0 },
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