ec/google/chromeec: Update ec_commands.h

Copy ec_commands.h directly from ChromiumOS EC repository (CL:1520574).

Since ec_commands.h already defines usb_charge_mode and only
USB_CHARGE_MODE_DISABLED is used in coreboot, enum usb_charge_mode is
removed from ec.h.

To avoid redefinition of the BIT macro, #ifndef check is added to
include/types.h.

BUG=b:109900671,b:118654976
BRANCH=none
TEST=emerge-kukui -j coreboot

Change-Id: I7ed5344fc8923e45e17c3e2a34371db6f80b079d
Signed-off-by: You-Cheng Syu <youcheng@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31885
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
You-Cheng Syu 2019-03-13 21:37:23 +08:00 committed by Patrick Georgi
parent f6f4a8f8de
commit 8d6ea6a491
4 changed files with 1613 additions and 798 deletions

View File

@ -978,7 +978,7 @@ static const char *reset_cause_to_str(uint16_t cause)
*/ */
static void google_chromeec_log_uptimeinfo(void) static void google_chromeec_log_uptimeinfo(void)
{ {
/* See also ChromiumOS EC include/system.h RESET_FLAG for details. */ /* See also ec_commands.h EC_RESET_FLAG_* for details. */
static const char * const reset_flag_strings[] = { static const char * const reset_flag_strings[] = {
"other", "other",
"reset-pin", "reset-pin",

View File

@ -94,13 +94,6 @@ int google_chromeec_cbi_get_oem_name(char *buf, size_t bufsize);
#define MEC_EMI_RANGE_START EC_HOST_CMD_REGION0 #define MEC_EMI_RANGE_START EC_HOST_CMD_REGION0
#define MEC_EMI_RANGE_END (EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SIZE) #define MEC_EMI_RANGE_END (EC_LPC_ADDR_MEMMAP + EC_MEMMAP_SIZE)
enum usb_charge_mode {
USB_CHARGE_MODE_DISABLED,
USB_CHARGE_MODE_CHARGE_AUTO,
USB_CHARGE_MODE_CHARGE_BC12,
USB_CHARGE_MODE_DOWNSTREAM_500MA,
USB_CHARGE_MODE_DOWNSTREAM_1500MA,
};
int google_chromeec_set_usb_charge_mode(u8 port_id, enum usb_charge_mode mode); int google_chromeec_set_usb_charge_mode(u8 port_id, enum usb_charge_mode mode);
int google_chromeec_set_usb_pd_role(u8 port, enum usb_pd_control_role role); int google_chromeec_set_usb_pd_role(u8 port, enum usb_pd_control_role role);
/* /*

File diff suppressed because it is too large Load Diff

View File

@ -25,7 +25,9 @@
* from the MSB (e.g. PowerPC), but until we cross that bridge, this macro is * from the MSB (e.g. PowerPC), but until we cross that bridge, this macro is
* perfectly fine. * perfectly fine.
*/ */
#ifndef BIT
#define BIT(x) (1ul << (x)) #define BIT(x) (1ul << (x))
#endif
/** /**
* coreboot error codes * coreboot error codes