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mb/google/nissa/var/pujjo: Modify WWAN warm reset sequence 

pujjo support FM101 WWAN, add delay of FCPO# to meet warm reset toff
minimum 500ms requirement.

BUG=b:260380268
TEST=Build and boot on pujjo

Signed-off-by: Stanley Wu <stanley1.wu@lcfc.corp-partner.google.com>
Change-Id: I63e599e76bd8a15ca44717823411576fa4df1c26
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70720
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Reka Norman <rekanorman@chromium.org>
This commit is contained in:
Stanley Wu 2022-12-13 16:58:26 +08:00 committed by Felix Held
parent 5dfec71829
commit 8d728c2090
1 changed files with 7 additions and 1 deletions
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8
src/mainboard/google/brya/variants/pujjo/gpio.c
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@ -33,8 +33,14 @@ static const struct pad_config override_gpio_table[] = {
static const struct pad_config early_gpio_table[] = {
/* A13 : GPP_A13 ==> GSC_SOC_INT_ODL */
PAD_CFG_GPI_APIC(GPP_A13, NONE, PLTRST, LEVEL, INVERT),
/*
* WWAN_EN is asserted in ramstage to meet the 500 ms warm reset toff
* requirement. WWAN_EN must be asserted before WWAN_RST_L is released
* (with min delay 0 ms), so this works as long as the pin used for
* WWAN_EN comes before the pin used for WWAN_RST_L.
*/
/* D6 : SRCCLKREQ1# ==> WWAN_EN */
PAD_CFG_GPO(GPP_D6, 1, DEEP),
PAD_CFG_GPO(GPP_D6, 0, DEEP),
/* E12 : THC0_SPI1_IO1 ==> SOC_WP_OD */
PAD_CFG_GPI_GPIO_DRIVER(GPP_E12, NONE, DEEP),
/* F12 : WWAN_RST_L */