rk3288/exynos5250/exynos5420: Consolidate timer files
Some boards spread their timer implementation out in multiple files with one function each for no discernable reason. Let's clean that up to make things a little simpler to find. BRANCH=None BUG=None TEST=Booted Pinky, compiled Daisy and Pit. Change-Id: I8b543d1a0d9af37bde5433b0c9271d687b2404b2 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 887765e1bd88d7aa49ad9a5e98b8831c10da6c10 Original-Change-Id: I43d29cd1b4a1d89cfd40f6cba5ca99ada3b00f82 Original-Signed-off-by: Julius Werner <jwerner@chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/234061 Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/9601 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
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@ -25,7 +25,6 @@ ifeq ($(CONFIG_BOOTBLOCK_CONSOLE),y)
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bootblock-$(CONFIG_DRIVERS_UART) += uart.c
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endif
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bootblock-y += timer.c
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bootblock-y += monotonic_timer.c
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bootblock-y += clock.c
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bootblock-y += spi.c
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bootblock-y += media.c
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@ -33,7 +32,6 @@ bootblock-y += gpio.c
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bootblock-y += i2c.c
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bootblock-y += rk808.c
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verstage-y += monotonic_timer.c
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verstage-y += spi.c
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verstage-y += timer.c
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verstage-$(CONFIG_DRIVERS_UART) += uart.c
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@ -44,7 +42,6 @@ verstage-y += media.c
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romstage-y += cbmem.c
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romstage-y += timer.c
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romstage-y += monotonic_timer.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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romstage-y += i2c.c
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romstage-y += clock.c
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@ -58,7 +55,6 @@ romstage-y += tsadc.c
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ramstage-y += soc.c
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ramstage-y += cbmem.c
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ramstage-y += timer.c
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ramstage-y += monotonic_timer.c
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ramstage-y += i2c.c
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ramstage-y += clock.c
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ramstage-y += spi.c
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@ -1,40 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2014 Rockchip Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <soc/addressmap.h>
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#include <soc/timer.h>
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#include <stdint.h>
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#include <timer.h>
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static uint64_t timer_raw_value(void)
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{
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uint64_t value0;
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uint64_t value1;
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value0 = (uint64_t)read32(&timer7_ptr->timer_curr_value0);
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value1 = (uint64_t)read32(&timer7_ptr->timer_curr_value1);
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value0 = value0 | value1<<32;
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return value0;
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}
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void timer_monotonic_get(struct mono_time *mt)
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{
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mono_time_set_usecs(mt, timer_raw_value() / clocks_per_usec);
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}
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@ -18,11 +18,27 @@
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*/
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#include <arch/io.h>
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#include <console/console.h>
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#include <delay.h>
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#include <soc/timer.h>
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#include <stdint.h>
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#include <timer.h>
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static uint64_t timer_raw_value(void)
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{
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uint64_t value0;
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uint64_t value1;
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value0 = (uint64_t)read32(&timer7_ptr->timer_curr_value0);
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value1 = (uint64_t)read32(&timer7_ptr->timer_curr_value1);
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value0 = value0 | value1<<32;
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return value0;
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}
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void timer_monotonic_get(struct mono_time *mt)
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{
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mono_time_set_usecs(mt, timer_raw_value() / clocks_per_usec);
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}
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void rk3288_init_timer(void)
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{
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write32(TIMER_LOAD_VAL, &timer7_ptr->timer_load_count0);
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@ -1,10 +1,9 @@
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bootblock-y += spi.c alternate_cbfs.c
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bootblock-y += bootblock.c
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bootblock-y += pinmux.c mct.c power.c
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bootblock-y += pinmux.c timer.c power.c
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# Clock is required for UART
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c
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ifeq ($(CONFIG_DRIVERS_UART),y)
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
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endif
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@ -18,8 +17,7 @@ romstage-y += pinmux.c # required by s3c24x0_i2c and uart.
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romstage-y += dmc_common.c
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romstage-y += dmc_init_ddr3.c
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romstage-y += power.c
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romstage-y += mct.c
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romstage-y += monotonic_timer.c
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romstage-y += timer.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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romstage-y += wakeup.c
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romstage-y += gpio.c
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@ -36,8 +34,7 @@ ramstage-y += power.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += cpu.c
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ramstage-y += tmu.c
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ramstage-y += mct.c
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ramstage-y += monotonic_timer.c
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ramstage-y += timer.c
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ramstage-y += gpio.c
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ramstage-y += i2c.c
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ramstage-y += dp-reg.c
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@ -1,36 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2012 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <soc/clk.h>
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#include <stdint.h>
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uint64_t mct_raw_value(void)
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{
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uint64_t upper = readl(&exynos_mct->g_cnt_u);
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uint64_t lower = readl(&exynos_mct->g_cnt_l);
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return (upper << 32) | lower;
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}
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void mct_start(void)
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{
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writel(readl(&exynos_mct->g_tcon) | (0x1 << 8),
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&exynos_mct->g_tcon);
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}
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@ -17,12 +17,27 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <soc/clk.h>
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#include <stdint.h>
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#include <timer.h>
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static const uint32_t clocks_per_usec = MCT_HZ/1000000;
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uint64_t mct_raw_value(void)
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{
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uint64_t upper = readl(&exynos_mct->g_cnt_u);
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uint64_t lower = readl(&exynos_mct->g_cnt_l);
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return (upper << 32) | lower;
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}
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void mct_start(void)
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{
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writel(readl(&exynos_mct->g_tcon) | (0x1 << 8),
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&exynos_mct->g_tcon);
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}
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void timer_monotonic_get(struct mono_time *mt)
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{
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/* We don't have to call mct_start() here
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@ -1,10 +1,9 @@
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bootblock-y += spi.c alternate_cbfs.c
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bootblock-y += bootblock.c
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bootblock-y += pinmux.c mct.c power.c
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bootblock-y += pinmux.c timer.c power.c
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# Clock is required for UART
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock_init.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += clock.c
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += monotonic_timer.c
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ifeq ($(CONFIG_DRIVERS_UART),y)
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bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += uart.c
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endif
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@ -19,8 +18,7 @@ romstage-y += pinmux.c # required by s3c24x0_i2c and uart.
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romstage-y += dmc_common.c
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romstage-y += dmc_init_ddr3.c
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romstage-y += power.c
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romstage-y += mct.c
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romstage-y += monotonic_timer.c
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romstage-y += timer.c
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romstage-$(CONFIG_DRIVERS_UART) += uart.c
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romstage-y += wakeup.c
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romstage-y += gpio.c
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@ -37,16 +35,14 @@ ramstage-y += power.c
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ramstage-$(CONFIG_DRIVERS_UART) += uart.c
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ramstage-y += cpu.c
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ramstage-y += tmu.c
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ramstage-y += mct.c
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ramstage-y += monotonic_timer.c
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ramstage-y += timer.c
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ramstage-y += gpio.c
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ramstage-y += i2c.c
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ramstage-y += dp.c dp_lowlevel.c fimd.c
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ramstage-y += usb.c
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ramstage-y += cbmem.c
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rmodules_$(ARCH-romstage-y)-y += monotonic_timer.c
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rmodules_$(ARCH-romstage-y)-y += mct.c
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rmodules_$(ARCH-ROMSTAGE-y)-y += timer.c
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CPPFLAGS_common += -Isrc/soc/samsung/exynos5420/include/
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@ -1,36 +0,0 @@
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/*
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* This file is part of the coreboot project.
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*
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* Copyright 2012 Google Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <soc/clk.h>
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#include <stdint.h>
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uint64_t mct_raw_value(void)
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{
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uint64_t upper = readl(&exynos_mct->g_cnt_u);
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uint64_t lower = readl(&exynos_mct->g_cnt_l);
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return (upper << 32) | lower;
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}
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void mct_start(void)
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{
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writel(readl(&exynos_mct->g_tcon) | (0x1 << 8),
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&exynos_mct->g_tcon);
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}
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@ -17,12 +17,27 @@
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <arch/io.h>
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#include <soc/clk.h>
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#include <stdint.h>
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#include <timer.h>
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static const uint32_t clocks_per_usec = MCT_HZ/1000000;
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uint64_t mct_raw_value(void)
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{
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uint64_t upper = readl(&exynos_mct->g_cnt_u);
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uint64_t lower = readl(&exynos_mct->g_cnt_l);
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return (upper << 32) | lower;
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}
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void mct_start(void)
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{
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writel(readl(&exynos_mct->g_tcon) | (0x1 << 8),
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&exynos_mct->g_tcon);
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}
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void timer_monotonic_get(struct mono_time *mt)
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{
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/* We don't have to call mct_start() here
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