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mb/starlabs/lite/glkr: Correct OverCurrent Pin 

The USB ports use both OC0 and OC1. Whilst they work perfectly with
OC_SKIP, set them to the correct pins.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: If173b443d9770083d76519b854b513d8e47b9e71
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64250
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@tutanota.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Sean Rhodes 2022-05-11 07:52:43 +01:00 committed by Martin L Roth
parent ff16e41b75
commit 8d991a8045
1 changed files with 6 additions and 6 deletions
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12
src/mainboard/starlabs/lite/variants/glkr/devicetree.cb
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@ -86,11 +86,11 @@ chip soc/intel/apollolake
device pci 15.0 on # XHCI
### USB 2.0 Devices
# Motherboard USB Type C
register "usb2_port[0]" = "PORT_EN(OC_SKIP)"
register "usb2_port[0]" = "PORT_EN(OC1)"
# Motherboard USB 3.0
register "usb2_port[1]" = "PORT_EN(OC_SKIP)"
register "usb2_port[1]" = "PORT_EN(OC0)"
# Daughterboard USB 3.0
register "usb2_port[3]" = "PORT_EN(OC_SKIP)"
register "usb2_port[3]" = "PORT_EN(OC1)"
# Daughterboard SD Card
register "usb2_port[5]" = "PORT_EN(OC_SKIP)"
# Internal Webcam
@ -98,11 +98,11 @@ chip soc/intel/apollolake
### USB 3.0 Devices
# Motherboard USB 3.0
register "usb3_port[0]" = "PORT_EN(OC_SKIP)"
register "usb3_port[0]" = "PORT_EN(OC0)"
# Motherboard USB Type C
register "usb3_port[1]" = "PORT_EN(OC_SKIP)"
register "usb3_port[1]" = "PORT_EN(OC1)"
# Daughterboard USB 3.0
register "usb3_port[3]" = "PORT_EN(OC_SKIP)"
register "usb3_port[3]" = "PORT_EN(OC1)"
end
device pci 15.1 off end # XDCI
device pci 16.0 off end # I2C0