mb/starlabs/starbook: Add support for VBOOT

Add the required files to support VBOOT for when it is enabled.

Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I842b79d8e144414ce42b3d0d9dfd2b5180ecf70d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74230
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Sean Rhodes 2023-04-05 09:10:14 +01:00 committed by Felix Held
parent 2eb5c1e83e
commit 8dad3f1afa
7 changed files with 104 additions and 0 deletions

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@ -115,6 +115,7 @@ config EC_VARIANT_DIR
default "merlin"
config FMDFILE
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/vboot.fmd" if VBOOT
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/board.fmd"
config IFD_BIN_PATH
@ -159,6 +160,9 @@ config UART_FOR_CONSOLE
config USE_PM_ACPI_TIMER
default n if BOARD_STARLABS_STARBOOK_TGL || BOARD_STARLABS_STARBOOK_ADL
config VBOOT
select VBOOT_VBNV_FLASH
config VARIANT_DIR
default "kbl" if BOARD_STARLABS_LABTOP_KBL
default "cml" if BOARD_STARLABS_LABTOP_CML

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@ -6,6 +6,10 @@ subdirs-y += variants/$(VARIANT_DIR)
bootblock-y += bootblock.c
verstage-$(CONFIG_VBOOT) += vboot.c
romstage-$(CONFIG_VBOOT) += vboot.c
ramstage-y += hda_verb.c
ramstage-y += mainboard.c
ramstage-y += smbios.c

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@ -0,0 +1,24 @@
FLASH 0x2000000 {
SI_ALL 0x1000000 {
SI_DESC 0x1000
SI_ME
}
SI_BIOS@0x1000000 0x32b000 {
EC@0x0 0x20000
RO_SECTION@0x20000 0x253000 {
FMAP@0x0 0x1000
COREBOOT(CBFS)@0x1000 0x210000
GBB@0x211000 0x40000
RO_FRID@0x251000 0x40
RO_VPD(PRESERVE)@0x252000 0x1000
}
MISC_RW@0x253000 0x10000 {
RW_MRC_CACHE@0x0 0x10000
}
SMMSTORE@0x263000 0x40000
CONSOLE@0x0x2a3000 0x20000
RW_NVRAM(PRESERVE)@0x2c3000 0x6000
RW_VPD(PRESERVE)@0x2c9000 0x2000
RW_LEGACY(CBFS)@0x32b000 0x60000
}
}

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@ -0,0 +1,20 @@
FLASH 0x1000000 {
BIOS@0x400000 0x32b000 {
EC@0x0 0x20000
RO_SECTION@0x20000 0x253000 {
FMAP@0x0 0x1000
COREBOOT(CBFS)@0x1000 0x210000
GBB@0x211000 0x40000
RO_FRID@0x251000 0x40
RO_VPD(PRESERVE)@0x252000 0x1000
}
MISC_RW@0x253000 0x10000 {
RW_MRC_CACHE@0x0 0x10000
}
SMMSTORE@0x263000 0x40000
CONSOLE@0x0x2a3000 0x20000
RW_NVRAM(PRESERVE)@0x2c3000 0x6000
RW_VPD(PRESERVE)@0x2c9000 0x2000
RW_LEGACY(CBFS)@0x32b000 0x60000
}
}

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@ -0,0 +1,20 @@
FLASH 0x800000 {
BIOS@0x200000 0x32b000 {
EC@0x0 0x20000
RO_SECTION@0x20000 0x253000 {
FMAP@0x0 0x1000
COREBOOT(CBFS)@0x1000 0x210000
GBB@0x211000 0x40000
RO_FRID@0x251000 0x40
RO_VPD(PRESERVE)@0x252000 0x1000
}
MISC_RW@0x253000 0x10000 {
RW_MRC_CACHE@0x0 0x10000
}
SMMSTORE@0x263000 0x40000
CONSOLE@0x0x2a3000 0x20000
RW_NVRAM(PRESERVE)@0x2c3000 0x6000
RW_VPD(PRESERVE)@0x2c9000 0x2000
RW_LEGACY(CBFS)@0x32b000 0x60000
}
}

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@ -0,0 +1,24 @@
FLASH 0x1000000 {
SI_ALL 0x500000 {
SI_DESC 0x1000
SI_ME
}
SI_BIOS@0xb00000 0x32b000 {
EC@0x0 0x20000
RO_SECTION@0x20000 0x253000 {
FMAP@0x0 0x1000
COREBOOT(CBFS)@0x1000 0x210000
GBB@0x211000 0x40000
RO_FRID@0x251000 0x40
RO_VPD(PRESERVE)@0x252000 0x1000
}
MISC_RW@0x253000 0x10000 {
RW_MRC_CACHE@0x0 0x10000
}
SMMSTORE@0x263000 0x40000
CONSOLE@0x0x2a3000 0x20000
RW_NVRAM(PRESERVE)@0x2c3000 0x6000
RW_VPD(PRESERVE)@0x2c9000 0x2000
RW_LEGACY(CBFS)@0x32b000 0x60000
}
}

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@ -0,0 +1,8 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
#include <bootmode.h>
int get_recovery_mode_switch(void)
{
return 0;
}