mb/starlabs/starbook: Add support for VBOOT
Add the required files to support VBOOT for when it is enabled. Signed-off-by: Sean Rhodes <sean@starlabs.systems> Change-Id: I842b79d8e144414ce42b3d0d9dfd2b5180ecf70d Reviewed-on: https://review.coreboot.org/c/coreboot/+/74230 Reviewed-by: Matt DeVillier <matt.devillier@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -115,6 +115,7 @@ config EC_VARIANT_DIR
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default "merlin"
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config FMDFILE
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default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/vboot.fmd" if VBOOT
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default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/variants/\$(CONFIG_VARIANT_DIR)/board.fmd"
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config IFD_BIN_PATH
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@ -159,6 +160,9 @@ config UART_FOR_CONSOLE
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config USE_PM_ACPI_TIMER
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default n if BOARD_STARLABS_STARBOOK_TGL || BOARD_STARLABS_STARBOOK_ADL
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config VBOOT
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select VBOOT_VBNV_FLASH
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config VARIANT_DIR
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default "kbl" if BOARD_STARLABS_LABTOP_KBL
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default "cml" if BOARD_STARLABS_LABTOP_CML
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@ -6,6 +6,10 @@ subdirs-y += variants/$(VARIANT_DIR)
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bootblock-y += bootblock.c
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verstage-$(CONFIG_VBOOT) += vboot.c
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romstage-$(CONFIG_VBOOT) += vboot.c
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ramstage-y += hda_verb.c
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ramstage-y += mainboard.c
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ramstage-y += smbios.c
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@ -0,0 +1,24 @@
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FLASH 0x2000000 {
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SI_ALL 0x1000000 {
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SI_DESC 0x1000
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SI_ME
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}
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SI_BIOS@0x1000000 0x32b000 {
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EC@0x0 0x20000
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RO_SECTION@0x20000 0x253000 {
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FMAP@0x0 0x1000
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COREBOOT(CBFS)@0x1000 0x210000
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GBB@0x211000 0x40000
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RO_FRID@0x251000 0x40
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RO_VPD(PRESERVE)@0x252000 0x1000
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}
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MISC_RW@0x253000 0x10000 {
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RW_MRC_CACHE@0x0 0x10000
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}
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SMMSTORE@0x263000 0x40000
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CONSOLE@0x0x2a3000 0x20000
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RW_NVRAM(PRESERVE)@0x2c3000 0x6000
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RW_VPD(PRESERVE)@0x2c9000 0x2000
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RW_LEGACY(CBFS)@0x32b000 0x60000
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}
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}
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@ -0,0 +1,20 @@
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FLASH 0x1000000 {
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BIOS@0x400000 0x32b000 {
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EC@0x0 0x20000
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RO_SECTION@0x20000 0x253000 {
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FMAP@0x0 0x1000
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COREBOOT(CBFS)@0x1000 0x210000
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GBB@0x211000 0x40000
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RO_FRID@0x251000 0x40
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RO_VPD(PRESERVE)@0x252000 0x1000
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}
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MISC_RW@0x253000 0x10000 {
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RW_MRC_CACHE@0x0 0x10000
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}
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SMMSTORE@0x263000 0x40000
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CONSOLE@0x0x2a3000 0x20000
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RW_NVRAM(PRESERVE)@0x2c3000 0x6000
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RW_VPD(PRESERVE)@0x2c9000 0x2000
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RW_LEGACY(CBFS)@0x32b000 0x60000
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}
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}
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@ -0,0 +1,20 @@
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FLASH 0x800000 {
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BIOS@0x200000 0x32b000 {
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EC@0x0 0x20000
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RO_SECTION@0x20000 0x253000 {
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FMAP@0x0 0x1000
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COREBOOT(CBFS)@0x1000 0x210000
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GBB@0x211000 0x40000
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RO_FRID@0x251000 0x40
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RO_VPD(PRESERVE)@0x252000 0x1000
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}
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MISC_RW@0x253000 0x10000 {
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RW_MRC_CACHE@0x0 0x10000
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}
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SMMSTORE@0x263000 0x40000
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CONSOLE@0x0x2a3000 0x20000
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RW_NVRAM(PRESERVE)@0x2c3000 0x6000
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RW_VPD(PRESERVE)@0x2c9000 0x2000
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RW_LEGACY(CBFS)@0x32b000 0x60000
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}
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}
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@ -0,0 +1,24 @@
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FLASH 0x1000000 {
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SI_ALL 0x500000 {
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SI_DESC 0x1000
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SI_ME
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}
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SI_BIOS@0xb00000 0x32b000 {
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EC@0x0 0x20000
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RO_SECTION@0x20000 0x253000 {
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FMAP@0x0 0x1000
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COREBOOT(CBFS)@0x1000 0x210000
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GBB@0x211000 0x40000
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RO_FRID@0x251000 0x40
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RO_VPD(PRESERVE)@0x252000 0x1000
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}
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MISC_RW@0x253000 0x10000 {
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RW_MRC_CACHE@0x0 0x10000
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}
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SMMSTORE@0x263000 0x40000
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CONSOLE@0x0x2a3000 0x20000
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RW_NVRAM(PRESERVE)@0x2c3000 0x6000
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RW_VPD(PRESERVE)@0x2c9000 0x2000
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RW_LEGACY(CBFS)@0x32b000 0x60000
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}
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}
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@ -0,0 +1,8 @@
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <bootmode.h>
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int get_recovery_mode_switch(void)
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{
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return 0;
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}
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