fix a bunch of cast and type warnings and don't call the apic "nvram", that
doesn't make no sense. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3977 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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@ -202,7 +202,7 @@ void acpi_create_ssdt_generator(acpi_header_t *ssdt, char *oem_table_id)
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ssdt->asl_compiler_revision = 42;
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ssdt->length = sizeof(acpi_header_t);
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acpigen_set_current((unsigned char *) current);
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acpigen_set_current((char *) current);
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current = acpi_fill_ssdt_generator(current, oem_table_id);
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/* recalculate length */
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@ -72,7 +72,7 @@ static void build_mb_mem_range(void *gp, struct device *dev, struct resource *re
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build_mb_mem_range_nooverlap(res->base, res->size);
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}
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#define ROUND(_r,_a) ((_r) + (((_a) - 1)) & ~((_a) - 1))
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#define ROUND(_r,_a) (((_r) + (((_a) - 1))) & ~((_a) - 1))
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unsigned long write_multiboot_info(
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unsigned long low_table_start, unsigned long low_table_end,
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@ -81,12 +81,12 @@ unsigned long write_multiboot_info(
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struct multiboot_info *mbi;
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int i;
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mbi = rom_table_end;
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mbi = (struct multiboot_info *)rom_table_end;
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memset(mbi, 0, sizeof(*mbi));
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rom_table_end += sizeof(*mbi);
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mbi->mmap_addr = (u32) rom_table_end;
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mb_mem = rom_table_end;
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mb_mem = (struct multiboot_mmap_entry *)rom_table_end;
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/* reserved regions */
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reserved_mem[0].addr = low_table_start;
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@ -111,5 +111,5 @@ unsigned long write_multiboot_info(
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printk_info("Multiboot Information structure has been written.\n");
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return mb_mem;
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return (unsigned long)mb_mem;
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}
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@ -182,7 +182,7 @@ struct lb_memory *write_tables(void)
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#if CONFIG_MULTIBOOT
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/* The Multiboot information structure */
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mbi = rom_table_end;
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mbi = (struct multiboot_info *)rom_table_end;
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rom_table_end = write_multiboot_info(
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low_table_start, low_table_end,
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rom_table_start, rom_table_end);
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@ -55,11 +55,11 @@ void setup_ioapic(void)
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{
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int i;
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unsigned long value_low, value_high;
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unsigned long nvram = 0xfec00000;
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unsigned long ioapicaddr = 0xfec00000;
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volatile unsigned long *l;
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struct ioapicreg *a = ioapicregvalues;
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l = (unsigned long *) nvram;
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l = (unsigned long *) ioapicaddr;
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#if defined(i786)
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/* For the pentium 4 and above apic deliver their interrupts
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* on the front side bus, enable that.
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@ -295,7 +295,7 @@ void stop_this_cpu(void)
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lapicid = lapic_read(LAPIC_ID) >> 24;
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printk_debug("CPU %d going down...\n", lapicid);
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printk_debug("CPU %ld going down...\n", lapicid);
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/* send an LAPIC INIT to myself */
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lapic_write_around(LAPIC_ICR2, SET_LAPIC_DEST_FIELD(lapicid));
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@ -104,6 +104,7 @@ static unsigned long long calibrate_tsc(void)
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unsigned long long start, end, delta;
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unsigned long result, count;
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printk_spew("Calibrating delay loop...\n");
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start = rdtscll();
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// no udivdi3, dammit.
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// so we count to 1<< 20 and then right shift 20
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@ -127,10 +128,10 @@ static unsigned long long calibrate_tsc(void)
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delta >>= 20;
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// save this for microsecond timing.
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result = delta;
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printk_spew("end %x, start %x\n", end, start);
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printk_spew("32-bit delta %d\n", (unsigned long) delta);
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printk_spew("end %llx, start %llx\n", end, start);
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printk_spew("32-bit delta %ld\n", (unsigned long) delta);
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printk_spew("%s 32-bit result is %d\n",
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printk_spew("%s 32-bit result is %ld\n",
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__func__,
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result);
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return delta;
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@ -143,7 +144,7 @@ void init_timer(void)
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{
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if (!clocks_per_usec) {
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clocks_per_usec = calibrate_tsc();
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printk_info("clocks_per_usec: %u\n", clocks_per_usec);
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printk_info("clocks_per_usec: %lu\n", clocks_per_usec);
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}
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}
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@ -357,8 +357,7 @@ void compute_allocate_resource(
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resource->flags &= ~IORESOURCE_STORED;
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base += size;
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printk_spew(
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"%s %02lx * [0x%08Lx - 0x%08Lx] %s\n",
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printk_spew("%s %02lx * [0x%08Lx - 0x%08Lx] %s\n",
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dev_path(dev),
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resource->index,
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resource->base,
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