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mb/google/brya/var/kinox: Correct the target of DPTF active policy 

Kinox has four temperature sensors. Modify the target of DPTF active
policy to map correct temperature sensor.

BUG=b:231380286
TEST=Boot to Chrome OS and doesn't see "DPTF: Invalid sensor ID" from ec
comsole.

Signed-off-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Change-Id: Icb5c285a6f483e2a1b6510a962ff7f7f6e9a79e3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64722
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Dtrain Hsu 2022-05-27 17:05:34 +08:00 committed by Martin L Roth
parent 10a500eb32
commit 8dd47aea04
1 changed files with 4 additions and 4 deletions
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8
src/mainboard/google/brya/variants/kinox/overridetree.cb
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@ -71,7 +71,7 @@ chip soc/intel/alderlake
} }
}, },
[1] = { [1] = {
.target = DPTF_TEMP_SENSOR_1, .target = DPTF_TEMP_SENSOR_0,
.thresholds = { .thresholds = {
TEMP_PCT(75, 97), TEMP_PCT(75, 97),
TEMP_PCT(70, 93), TEMP_PCT(70, 93),
@ -84,7 +84,7 @@ chip soc/intel/alderlake
} }
}, },
[2] = { [2] = {
.target = DPTF_TEMP_SENSOR_2, .target = DPTF_TEMP_SENSOR_1,
.thresholds = { .thresholds = {
TEMP_PCT(75, 97), TEMP_PCT(75, 97),
TEMP_PCT(70, 93), TEMP_PCT(70, 93),
@ -97,7 +97,7 @@ chip soc/intel/alderlake
} }
}, },
[3] = { [3] = {
.target = DPTF_TEMP_SENSOR_3, .target = DPTF_TEMP_SENSOR_2,
.thresholds = { .thresholds = {
TEMP_PCT(75, 97), TEMP_PCT(75, 97),
TEMP_PCT(70, 93), TEMP_PCT(70, 93),
@ -110,7 +110,7 @@ chip soc/intel/alderlake
} }
}, },
[4] = { [4] = {
.target = DPTF_TEMP_SENSOR_4, .target = DPTF_TEMP_SENSOR_3,
.thresholds = { .thresholds = {
TEMP_PCT(75, 97), TEMP_PCT(75, 97),
TEMP_PCT(70, 93), TEMP_PCT(70, 93),