src: Move `select ARCH_X86` to platforms

To generalise the choice of 32-bit or 64-bit coreboot on x86 hardware,
have platforms select `ARCH_X86` directly instead of through per-stage
Kconfig options, effectively reversing the dependency order.

Change-Id: If15436817ba664398055e9efc6c7c656de3bf3e4
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55758
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Rudolph <siro@das-labor.org>

src/arch/x86/Kconfig

@@ -6,19 +6,18 @@ config ARCH_X86
 	select RELOCATABLE_MODULES
 	select HAVE_ASAN_IN_RAMSTAGE
 
+if ARCH_X86
+
 # stage selectors for x86
 
 config ARCH_BOOTBLOCK_X86_32
 	bool
-	select ARCH_X86
 
 config ARCH_VERSTAGE_X86_32
 	bool
-	select ARCH_X86
 
 config ARCH_ROMSTAGE_X86_32
 	bool
-	select ARCH_X86
 
 config ARCH_POSTCAR_X86_32
 	bool
@@ -26,7 +25,6 @@ config ARCH_POSTCAR_X86_32
 
 config ARCH_RAMSTAGE_X86_32
 	bool
-	select ARCH_X86
 
 config ARCH_ALL_STAGES_X86_32
 	bool
@@ -39,15 +37,12 @@ config ARCH_ALL_STAGES_X86_32
 
 config ARCH_BOOTBLOCK_X86_64
 	bool
-	select ARCH_X86
 
 config ARCH_VERSTAGE_X86_64
 	bool
-	select ARCH_X86
 
 config ARCH_ROMSTAGE_X86_64
 	bool
-	select ARCH_X86
 
 config ARCH_POSTCAR_X86_64
 	bool
@@ -55,7 +50,6 @@ config ARCH_POSTCAR_X86_64
 
 config ARCH_RAMSTAGE_X86_64
 	bool
-	select ARCH_X86
 
 config ARCH_ALL_STAGES_X86_64
 	bool
@@ -64,8 +58,6 @@ config ARCH_ALL_STAGES_X86_64
 	select ARCH_ROMSTAGE_X86_64
 	select ARCH_RAMSTAGE_X86_64
 
-if ARCH_X86
-
 config ARCH_X86_64_PGTBL_LOC
 	hex "x86_64 page table location in CBFS"
 	depends on ARCH_BOOTBLOCK_X86_64

src/cpu/amd/agesa/Kconfig

@@ -7,6 +7,7 @@ config CPU_AMD_AGESA
 	default y if CPU_AMD_AGESA_FAMILY16_KB
 	default n
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select DRIVERS_AMD_PI
 	select TSC_SYNC_LFENCE
 	select UDELAY_LAPIC

src/cpu/amd/pi/Kconfig

@@ -5,6 +5,7 @@ config CPU_AMD_PI
 	default y if CPU_AMD_PI_00730F01
 	default n
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select DRIVERS_AMD_PI
 	select TSC_SYNC_LFENCE
 	select UDELAY_LAPIC

src/cpu/intel/haswell/Kconfig

@@ -7,6 +7,7 @@ if CPU_INTEL_HASWELL
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
 	select MMX
 	select SSE2

src/cpu/intel/model_1067x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_1067X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_106cx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_106CX
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_2065x/Kconfig

@@ -6,6 +6,7 @@ if CPU_INTEL_MODEL_2065X
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
 	select SSE2
 	select UDELAY_TSC

src/cpu/intel/model_206ax/Kconfig

@@ -12,6 +12,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_ALL_STAGES_X86_32 if !ARCH_EXP_X86_64
 	select ARCH_ALL_STAGES_X86_64 if ARCH_EXP_X86_64
+	select ARCH_X86
 	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
 	select MMX
 	select SSE2

src/cpu/intel/model_65x/Kconfig

@@ -1,4 +1,5 @@
 config CPU_INTEL_MODEL_65X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/intel/model_67x/Kconfig

@@ -1,4 +1,5 @@
 config CPU_INTEL_MODEL_67X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/intel/model_68x/Kconfig

@@ -3,4 +3,5 @@
 config CPU_INTEL_MODEL_68X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/intel/model_6bx/Kconfig

@@ -1,4 +1,5 @@
 config CPU_INTEL_MODEL_6BX
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/intel/model_6ex/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_6EX
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_6fx/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_6FX
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SSE2
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER

src/cpu/intel/model_6xx/Kconfig

@@ -1,4 +1,5 @@
 config CPU_INTEL_MODEL_6XX
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/intel/model_f2x/Kconfig

@@ -1,6 +1,7 @@
 config CPU_INTEL_MODEL_F2X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select SMM_ASEG
 	select CPU_INTEL_COMMON

src/cpu/intel/model_f3x/Kconfig

@@ -1,5 +1,6 @@
 config CPU_INTEL_MODEL_F3X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS
 	select CPU_INTEL_COMMON

src/cpu/intel/model_f4x/Kconfig

@@ -1,4 +1,5 @@
 config CPU_INTEL_MODEL_F4X
 	bool
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select SUPPORT_CPU_UCODE_IN_CBFS

src/cpu/qemu-x86/Kconfig

@@ -2,6 +2,7 @@
 
 config CPU_QEMU_X86
 	bool
+	select ARCH_X86
 	select UDELAY_TSC
 	select TSC_MONOTONIC_TIMER
 	select UNKNOWN_TSC_RATE

src/soc/amd/cezanne/Kconfig

@@ -14,6 +14,7 @@ config SOC_SPECIFIC_OPTIONS
 	select ARCH_VERSTAGE_X86_32 if !VBOOT_STARTS_BEFORE_BOOTBLOCK
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
 	select DRIVERS_USB_ACPI
 	select DRIVERS_I2C_DESIGNWARE

src/soc/amd/picasso/Kconfig

@@ -13,6 +13,7 @@ config CPU_SPECIFIC_OPTIONS
 	select ARCH_VERSTAGE_X86_32 if !VBOOT_STARTS_BEFORE_BOOTBLOCK
 	select ARCH_ROMSTAGE_X86_32
 	select ARCH_RAMSTAGE_X86_32
+	select ARCH_X86
 	select RESET_VECTOR_IN_RAM
 	select X86_AMD_FIXED_MTRRS
 	select X86_AMD_INIT_SIPI

src/soc/amd/stoneyridge/Kconfig

@@ -11,6 +11,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ACPI_SOC_NVS
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES if BOOT_DEVICE_SPI_FLASH
 	select COLLECT_TIMESTAMPS_NO_TSC
 	select DRIVERS_I2C_DESIGNWARE

src/soc/example/min86/Kconfig

@@ -15,6 +15,7 @@ if SOC_EXAMPLE_MIN86
 config SOC_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select NO_MONOTONIC_TIMER
 	select NO_MMCONF_SUPPORT
 	select UNKNOWN_TSC_RATE

src/soc/intel/alderlake/Kconfig

@@ -14,6 +14,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CACHE_MRC_SETTINGS
 	select CPU_INTEL_COMMON

src/soc/intel/apollolake/Kconfig

@@ -25,6 +25,7 @@ config CPU_SPECIFIC_OPTIONS
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ACPI_NO_PCAT_8259
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	# CPU specific options
 	select CPU_INTEL_COMMON

src/soc/intel/baytrail/Kconfig

@@ -9,6 +9,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CACHE_MRC_SETTINGS

src/soc/intel/braswell/Kconfig

@@ -9,6 +9,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SPI_FLASH_NO_EARLY_WRITES
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CACHE_MRC_SETTINGS

src/soc/intel/cannonlake/Kconfig

@@ -48,6 +48,7 @@ config CPU_SPECIFIC_OPTIONS
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ACPI_NHLT
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CACHE_MRC_SETTINGS
 	select CPU_INTEL_COMMON

src/soc/intel/denverton_ns/Kconfig

@@ -14,6 +14,7 @@ config CPU_INTEL_NUM_FIT_ENTRIES
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select DEBUG_GPIO
 	select SOC_INTEL_COMMON

src/soc/intel/elkhartlake/Kconfig

@@ -9,6 +9,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CACHE_MRC_SETTINGS
 	select CPU_INTEL_COMMON

src/soc/intel/icelake/Kconfig

@@ -9,6 +9,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CACHE_MRC_SETTINGS
 	select SET_IA32_FC_LOCK_BIT

src/soc/intel/jasperlake/Kconfig

@@ -9,6 +9,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CACHE_MRC_SETTINGS
 	select CPU_INTEL_COMMON

src/soc/intel/quark/Kconfig

@@ -10,6 +10,7 @@ if SOC_INTEL_QUARK
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select NO_MMCONF_SUPPORT
 	select REG_SCRIPT
 	select PLATFORM_USES_FSP2_0

src/soc/intel/skylake/Kconfig

@@ -24,6 +24,7 @@ config CPU_SPECIFIC_OPTIONS
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ACPI_NHLT
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CACHE_MRC_SETTINGS
 	select CPU_INTEL_COMMON

src/soc/intel/tigerlake/Kconfig

@@ -9,6 +9,7 @@ config CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ACPI_INTEL_HARDWARE_SLEEP_VALUES
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CACHE_MRC_SETTINGS
 	select CPU_INTEL_COMMON

src/soc/intel/xeon_sp/Kconfig

@@ -27,6 +27,7 @@ if XEON_SP_COMMON_BASE
 config	CPU_SPECIFIC_OPTIONS
 	def_bool y
 	select ARCH_ALL_STAGES_X86_32
+	select ARCH_X86
 	select BOOT_DEVICE_SUPPORTS_WRITES
 	select CPU_INTEL_COMMON
 	select SOC_INTEL_COMMON