soc/intel/meteorlake: Reorg TCSS related configs

This patch moves all required TCSS related configs under one umbrella
config named `SOC_INTEL_METEORLAKE_TCSS_USB4_SUPPORT`. This effort will
help in future to deselect the TCSS support for MTL SoC SKUs.

TEST=Able to build and boot Google/Rex.

Change-Id: Id86e52842d2f8ab4dbec4a8776791e1266b94298
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/70671
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2022-12-13 12:16:52 +05:30
parent b5fc0c4088
commit 8e158597f9
1 changed files with 8 additions and 4 deletions

View File

@ -74,11 +74,7 @@ config CPU_SPECIFIC_OPTIONS
select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SA
select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM
select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
select SOC_INTEL_COMMON_BLOCK_TCSS
select SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC select SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC
select SOC_INTEL_COMMON_BLOCK_USB4
select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
select SOC_INTEL_COMMON_BLOCK_USB4_XHCI
select SOC_INTEL_COMMON_BLOCK_XHCI select SOC_INTEL_COMMON_BLOCK_XHCI
select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
select SOC_INTEL_COMMON_BASECODE select SOC_INTEL_COMMON_BASECODE
@ -97,6 +93,14 @@ config CPU_SPECIFIC_OPTIONS
select UDK_202111_BINDING select UDK_202111_BINDING
select X86_INIT_NEED_1_SIPI select X86_INIT_NEED_1_SIPI
config SOC_INTEL_METEORLAKE_TCSS_USB4_SUPPORT
bool
default y
select SOC_INTEL_COMMON_BLOCK_TCSS
select SOC_INTEL_COMMON_BLOCK_USB4
select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
select SOC_INTEL_COMMON_BLOCK_USB4_XHCI
config MAX_CPUS config MAX_CPUS
int int
default 22 default 22