soc/intel/meteorlake: Reorg TCSS related configs
This patch moves all required TCSS related configs under one umbrella config named `SOC_INTEL_METEORLAKE_TCSS_USB4_SUPPORT`. This effort will help in future to deselect the TCSS support for MTL SoC SKUs. TEST=Able to build and boot Google/Rex. Change-Id: Id86e52842d2f8ab4dbec4a8776791e1266b94298 Signed-off-by: Subrata Banik <subratabanik@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70671 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
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@ -74,11 +74,7 @@ config CPU_SPECIFIC_OPTIONS
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select SOC_INTEL_COMMON_BLOCK_SA
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select SOC_INTEL_COMMON_BLOCK_SA
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select SOC_INTEL_COMMON_BLOCK_SMM
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select SOC_INTEL_COMMON_BLOCK_SMM
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select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
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select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP
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select SOC_INTEL_COMMON_BLOCK_TCSS
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select SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC
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select SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC
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select SOC_INTEL_COMMON_BLOCK_USB4
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select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
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select SOC_INTEL_COMMON_BLOCK_USB4_XHCI
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select SOC_INTEL_COMMON_BLOCK_XHCI
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select SOC_INTEL_COMMON_BLOCK_XHCI
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select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
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select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG
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select SOC_INTEL_COMMON_BASECODE
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select SOC_INTEL_COMMON_BASECODE
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@ -97,6 +93,14 @@ config CPU_SPECIFIC_OPTIONS
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select UDK_202111_BINDING
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select UDK_202111_BINDING
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select X86_INIT_NEED_1_SIPI
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select X86_INIT_NEED_1_SIPI
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config SOC_INTEL_METEORLAKE_TCSS_USB4_SUPPORT
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bool
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default y
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select SOC_INTEL_COMMON_BLOCK_TCSS
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select SOC_INTEL_COMMON_BLOCK_USB4
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select SOC_INTEL_COMMON_BLOCK_USB4_PCIE
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select SOC_INTEL_COMMON_BLOCK_USB4_XHCI
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config MAX_CPUS
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config MAX_CPUS
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int
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int
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default 22
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default 22
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