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- For now use port 0x80 based delays in for the e7501 memory initialization. 

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Eric Biederman 2004-10-23 03:00:02 +00:00
parent 60216355d2
commit 8e2847c28e
2 changed files with 15 additions and 3 deletions
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2
src/mainboard/tyan/s2735/auto.c
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@ -14,8 +14,10 @@
#include "ram/ramtest.c" #include "ram/ramtest.c"
#include "southbridge/intel/i82801er/i82801er_early_smbus.c" #include "southbridge/intel/i82801er/i82801er_early_smbus.c"
#include "northbridge/intel/e7501/raminit.h" #include "northbridge/intel/e7501/raminit.h"
#if 0
#include "cpu/intel/model_f2x/apic_timer.c" #include "cpu/intel/model_f2x/apic_timer.c"
#include "lib/delay.c" #include "lib/delay.c"
#endif
#include "cpu/x86/lapic/boot_cpu.c" #include "cpu/x86/lapic/boot_cpu.c"
#include "northbridge/intel/e7501/debug.c" #include "northbridge/intel/e7501/debug.c"
#include "superio/winbond/w83627hf/w83627hf_early_serial.c" #include "superio/winbond/w83627hf/w83627hf_early_serial.c"

16
src/northbridge/intel/e7501/raminit.c
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@ -492,8 +492,11 @@ static void write_8dwords(uint32_t src_addr, uint32_t dst_addr) {
} }
} }
//#define SLOW_DOWN_IO inb(0x80); #if 1
#define SLOW_DOWN_IO inb(0x80);
#else
#define SLOW_DOWN_IO udelay(40); #define SLOW_DOWN_IO udelay(40);
#endif
static void ram_set_rcomp_regs(const struct mem_controller *ctrl) { static void ram_set_rcomp_regs(const struct mem_controller *ctrl) {
uint32_t dword; uint32_t dword;
@ -1978,10 +1981,17 @@ static void mem_err {
/* Estimate that SLOW_DOWN_IO takes about 50&76us*/ /* Estimate that SLOW_DOWN_IO takes about 50&76us*/
/* delay for 200us */ /* delay for 200us */
#if 1
static void do_delay(void)
{
int i;
for(i = 0; i < 16; i++) { SLOW_DOWN_IO }
}
#define DO_DELAY do_delay();
#else
#define DO_DELAY \ #define DO_DELAY \
udelay(200); udelay(200);
// for(i=0; i<16;i++) { SLOW_DOWN_IO } #endif
#define EXTRA_DELAY DO_DELAY #define EXTRA_DELAY DO_DELAY