haswell: lapic timer support

Haswell's BCLK is fised at 100MHz like Sandy/Ivy. Add Haswell's model
to the switch statement.

Change-Id: Ib9e2afc04eba940bfcee92a6ee5402759b21cc45
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: http://review.coreboot.org/2747
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>

src/cpu/x86/lapic/apic_timer.c

@@ -62,6 +62,8 @@ static int set_timer_fsb(void)
 		break;
 	case 0x2a: /* SandyBridge BCLK fixed at 100MHz*/
 	case 0x3a: /* IvyBridge BCLK fixed at 100MHz*/
+	case 0x3c: /* Haswell BCLK fixed at 100MHz */
+	case 0x45: /* Haswell-ULT BCLK fixed at 100MHz */
 		timer_fsb = 100;
 		break;
 	default: