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memlayout: Add timestamp regions for t210 and cygnus 

This is needed to make those SOCs compile with timestamps enabled.

Change-Id: Iac20cb9911e1c76a18c8530385c9d7b8b46399e5
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: http://review.coreboot.org/10833
Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Tested-by: build bot (Jenkins)
This commit is contained in:
Stefan Reinauer 2015-07-07 17:17:32 -07:00
parent 9eb6180963
commit 8e3997552a
3 changed files with 4 additions and 1 deletions
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1
src/soc/broadcom/cygnus/include/soc/memlayout.ld
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@ -34,6 +34,7 @@ SECTIONS
VBOOT2_WORK(0x02010000, 16K) VBOOT2_WORK(0x02010000, 16K)
OVERLAP_VERSTAGE_ROMSTAGE(0x02014000, 120K) OVERLAP_VERSTAGE_ROMSTAGE(0x02014000, 120K)
PRERAM_CBFS_CACHE(0x02032000, 1K) PRERAM_CBFS_CACHE(0x02032000, 1K)
TIMESTAMP(0x02032400, 1K)
STACK(0x02033000, 12K) STACK(0x02033000, 12K)
REGION(reserved_for_secure_service_api, 0x0203F000, 4K, 4) REGION(reserved_for_secure_service_api, 0x0203F000, 4K, 4)
SRAM_END(0x02040000) SRAM_END(0x02040000)

3
src/soc/nvidia/tegra210/include/soc/memlayout.ld
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@ -34,7 +34,8 @@ SECTIONS
PRERAM_CBMEM_CONSOLE(0x40000000, 8K) PRERAM_CBMEM_CONSOLE(0x40000000, 8K)
PRERAM_CBFS_CACHE(0x40002000, 84K) PRERAM_CBFS_CACHE(0x40002000, 84K)
STACK(0x40017000, 16K) STACK(0x40017000, 16K)
BOOTBLOCK(0x4001B000, 26K) TIMESTAMP(0x4001B000, 2K)
BOOTBLOCK(0x4001B800, 24K)
ROMSTAGE(0x40022000, 120K) ROMSTAGE(0x40022000, 120K)
SRAM_END(0x40040000) SRAM_END(0x40040000)

1
src/soc/nvidia/tegra210/include/soc/memlayout_vboot2.ld
View File

@ -36,6 +36,7 @@ SECTIONS
PRERAM_CBFS_CACHE(0x40002000, 72K) PRERAM_CBFS_CACHE(0x40002000, 72K)
VBOOT2_WORK(0x40014000, 16K) VBOOT2_WORK(0x40014000, 16K)
STACK(0x40018000, 2K) STACK(0x40018000, 2K)
TIMESTAMP(0x40018800, 2K)
BOOTBLOCK(0x40019000, 24K) BOOTBLOCK(0x40019000, 24K)
VERSTAGE(0x4001F000, 52K) VERSTAGE(0x4001F000, 52K)
ROMSTAGE(0x4002C000, 80K) ROMSTAGE(0x4002C000, 80K)