diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig
index a5df92a044..ee3b80ea85 100644
--- a/src/soc/nvidia/tegra132/Kconfig
+++ b/src/soc/nvidia/tegra132/Kconfig
@@ -15,6 +15,7 @@ config SOC_NVIDIA_TEGRA132
 	select SMP
 	select ARM64_USE_SECURE_MONITOR
 	select GENERIC_GPIO_LIB
+	select HAS_PRECBMEM_TIMESTAMP_REGION
 
 if SOC_NVIDIA_TEGRA132
 
diff --git a/src/soc/nvidia/tegra132/bootblock.c b/src/soc/nvidia/tegra132/bootblock.c
index b19cf494cb..29a15d9655 100644
--- a/src/soc/nvidia/tegra132/bootblock.c
+++ b/src/soc/nvidia/tegra132/bootblock.c
@@ -26,6 +26,7 @@
 #include <soc/clock.h>
 #include <soc/nvidia/tegra/apbmisc.h>
 #include <soc/power.h>
+#include <timestamp.h>
 
 #define BCT_OFFSET_IN_BIT	0x50
 #define ODMDATA_OFFSET_IN_BCT	0x6A8
@@ -57,6 +58,9 @@ void __attribute__((weak)) bootblock_mainboard_early_init(void)
 
 void main(void)
 {
+	timestamp_init(0);
+	timestamp_add_now(TS_START_BOOTBLOCK);
+
 	// enable JTAG at the earliest stage
 	enable_jtag();
 
diff --git a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
index 2fba8ef7e8..0f98fd2b3b 100644
--- a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
+++ b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld
@@ -36,6 +36,7 @@ SECTIONS
 	PRERAM_CBFS_CACHE(0x40002000, 72K)
 	VBOOT2_WORK(0x40014000, 16K)
 	STACK(0x40018000, 2K)
+	TIMESTAMP(0x40018800, 2K)
 	BOOTBLOCK(0x40019000, 22K)
 	VERSTAGE(0x4001e800, 58K)
 	ROMSTAGE(0x4002d000, 76K)
diff --git a/src/soc/nvidia/tegra132/romstage.c b/src/soc/nvidia/tegra132/romstage.c
index 6476e06031..ae295c035a 100644
--- a/src/soc/nvidia/tegra132/romstage.c
+++ b/src/soc/nvidia/tegra132/romstage.c
@@ -31,6 +31,7 @@
 #include <soc/sdram_configs.h>
 #include <soc/romstage.h>
 #include <timer.h>
+#include <timestamp.h>
 
 void __attribute__((weak)) romstage_mainboard_init(void)
 {
@@ -39,6 +40,8 @@ void __attribute__((weak)) romstage_mainboard_init(void)
 
 void romstage(void)
 {
+	timestamp_add_now(TS_START_ROMSTAGE);
+
 	console_init();
 	exception_init();
 
@@ -52,6 +55,8 @@ void romstage(void)
 	printk(BIOS_INFO, "T132 romstage: sdram_init done\n");
 #endif
 
+	timestamp_add_now(TS_AFTER_INITRAM);
+
 	/*
 	 * Trust Zone needs to be initialized after the DRAM initialization
 	 * because carveout registers are programmed during DRAM init.
diff --git a/src/soc/nvidia/tegra132/verstage.c b/src/soc/nvidia/tegra132/verstage.c
index b70028a017..d6eba9a8ef 100644
--- a/src/soc/nvidia/tegra132/verstage.c
+++ b/src/soc/nvidia/tegra132/verstage.c
@@ -24,6 +24,7 @@
 #include <console/console.h>
 #include <soc/verstage.h>
 #include <program_loading.h>
+#include <timestamp.h>
 
 void __attribute__((weak)) verstage_mainboard_init(void)
 {
@@ -33,6 +34,7 @@ void __attribute__((weak)) verstage_mainboard_init(void)
 static void verstage(void)
 {
 	console_init();
+	timestamp_add_now(TS_START_VBOOT);
 	exception_init();
 	verstage_mainboard_init();