soc/amd,mb/google/,mb/amd: Move sleepstates.asl
This file is common for all the AMD platforms. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I10ee600b4bcd7aaff39bfab075eb4dbc9096b435 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51299 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
parent
7778cf2d30
commit
8e6059db28
|
@ -25,7 +25,7 @@ DefinitionBlock (
|
|||
#include <cpu.asl>
|
||||
|
||||
/* Contains the supported sleep states for this chipset */
|
||||
#include <sleepstates.asl>
|
||||
#include <soc/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Contains _SWS methods */
|
||||
#include <soc/amd/common/acpi/acpi_wake_source.asl>
|
||||
|
|
|
@ -28,7 +28,7 @@ DefinitionBlock (
|
|||
#include <cpu.asl>
|
||||
|
||||
/* Contains the supported sleep states for this chipset */
|
||||
#include <sleepstates.asl>
|
||||
#include <soc/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
|
||||
#include "acpi/sleep.asl"
|
||||
|
|
|
@ -25,7 +25,7 @@ DefinitionBlock (
|
|||
#include <cpu.asl>
|
||||
|
||||
/* Contains the supported sleep states for this chipset */
|
||||
#include <sleepstates.asl>
|
||||
#include <soc/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Contains _SWS methods */
|
||||
#include <soc/amd/common/acpi/acpi_wake_source.asl>
|
||||
|
|
|
@ -26,7 +26,7 @@ DefinitionBlock (
|
|||
#include <cpu.asl>
|
||||
|
||||
/* Contains the supported sleep states for this chipset */
|
||||
#include <sleepstates.asl>
|
||||
#include <soc/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
|
||||
#include "acpi/sleep.asl"
|
||||
|
|
|
@ -28,7 +28,7 @@ DefinitionBlock (
|
|||
#include <cpu.asl>
|
||||
|
||||
/* Contains the supported sleep states for this chipset */
|
||||
#include <sleepstates.asl>
|
||||
#include <soc/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Contains the Sleep methods (WAK, PTS, GTS, etc.) */
|
||||
#include <variant/acpi/sleep.asl>
|
||||
|
|
|
@ -26,7 +26,7 @@ DefinitionBlock (
|
|||
#include <cpu.asl>
|
||||
|
||||
/* Contains the supported sleep states for this chipset */
|
||||
#include <sleepstates.asl>
|
||||
#include <soc/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* Contains _SWS methods */
|
||||
#include <soc/amd/common/acpi/acpi_wake_source.asl>
|
||||
|
|
|
@ -1,28 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
|
||||
/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */
|
||||
Name(SSFG, 0x09)
|
||||
If (CONFIG(HAVE_ACPI_RESUME)) {
|
||||
SSFG = 0x0d
|
||||
}
|
||||
If (CONFIG(DISABLE_ACPI_HIBERNATE)) {
|
||||
SSFG &= 0xf7
|
||||
}
|
||||
|
||||
/* Supported sleep states: */
|
||||
Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */
|
||||
|
||||
If (SSFG & 0x01) {
|
||||
Name(\_S1, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S1) - sleeping w/CPU context */
|
||||
}
|
||||
If (SSFG & 0x02) {
|
||||
Name(\_S2, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S2) - "light" Suspend to RAM */
|
||||
}
|
||||
If (SSFG & 0x04) {
|
||||
Name(\_S3, Package () {0x03, 0x03, 0x00, 0x00} ) /* (S3) - Suspend to RAM */
|
||||
}
|
||||
If (SSFG & 0x08) {
|
||||
Name(\_S4, Package () {0x04, 0x04, 0x00, 0x00} ) /* (S4) - Suspend to Disk */
|
||||
}
|
||||
|
||||
Name(\_S5, Package () {0x05, 0x05, 0x00, 0x00} ) /* (S5) - Soft Off */
|
Loading…
Reference in New Issue