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vendorcode/amd: Satisfy clang's bracing requirements 

src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h:3688:7: error:
suggest braces around initialization of subobject

Change-Id: Id086a64205dfffa2d1324993f4164508b57b6993
Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-on: https://review.coreboot.org/20382
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Stefan Reinauer 2017-06-25 05:46:56 +02:00
parent c02b5e22a3
commit 8e6bb80e9a
5 changed files with 10 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h
View File

@ -4089,7 +4089,7 @@ BOOLEAN MemFS3DefConstructorRet (
0 0
}; };
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = { MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
0 { 0 }
}; };
#endif #endif
#if OPTION_DDR3 #if OPTION_DDR3
@ -4097,7 +4097,7 @@ BOOLEAN MemFS3DefConstructorRet (
0 0
}; };
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = { MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
0 { 0 }
}; };
#endif #endif
/*--------------------------------------------------------------------------------------------------- /*---------------------------------------------------------------------------------------------------

4
src/vendorcode/amd/agesa/f14/Include/OptionMemoryInstall.h
View File

@ -3921,7 +3921,7 @@ BOOLEAN MemFS3DefConstructorRet (
0 0
}; };
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = { MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
0 { 0 }
}; };
#endif #endif
#if OPTION_DDR3 #if OPTION_DDR3
@ -3929,7 +3929,7 @@ BOOLEAN MemFS3DefConstructorRet (
0 0
}; };
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = { MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
0 { 0 }
}; };
#endif #endif
/*--------------------------------------------------------------------------------------------------- /*---------------------------------------------------------------------------------------------------

4
src/vendorcode/amd/agesa/f15/Include/OptionMemoryInstall.h
View File

@ -3677,7 +3677,7 @@ BOOLEAN MemFS3DefConstructorRet (
0 0
}; };
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = { MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
0 { 0 }
}; };
#endif #endif
#if OPTION_DDR3 #if OPTION_DDR3
@ -3685,7 +3685,7 @@ BOOLEAN MemFS3DefConstructorRet (
0 0
}; };
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = { MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
0 { 0 }
}; };
#endif #endif
/*--------------------------------------------------------------------------------------------------- /*---------------------------------------------------------------------------------------------------

4
src/vendorcode/amd/agesa/f15tn/Include/OptionMemoryInstall.h
View File

@ -4747,7 +4747,7 @@ BOOLEAN MemFS3DefConstructorRet (
0 0
}; };
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = { MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
0 { 0 }
}; };
#endif #endif
#if OPTION_DDR3 #if OPTION_DDR3
@ -4755,7 +4755,7 @@ BOOLEAN MemFS3DefConstructorRet (
0 0
}; };
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = { MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
0 { 0 }
}; };
#endif #endif
/*--------------------------------------------------------------------------------------------------- /*---------------------------------------------------------------------------------------------------

4
src/vendorcode/amd/agesa/f16kb/Include/OptionMemoryInstall.h
View File

@ -1584,7 +1584,7 @@ BOOLEAN MemFS3DefConstructorRet (
0 0
}; };
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = { MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR2[] = {
0 { 0 }
}; };
#endif #endif
#if OPTION_DDR3 #if OPTION_DDR3
@ -1592,7 +1592,7 @@ BOOLEAN MemFS3DefConstructorRet (
0 0
}; };
MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = { MEM_FEAT_TRAIN_SEQ memTrainSequenceDDR3[] = {
0 { 0 }
}; };
#endif #endif
/*--------------------------------------------------------------------------------------------------- /*---------------------------------------------------------------------------------------------------