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mb/lenovo/t440p/devicetree.cb: Visually align devices 

Visually align devices and corresponding comments in the devicetree.

Tested with BUILD_TIMELESS=1, Lenovo T440p remains identical.

Change-Id: Id6f521275ffd0b35c247152dc9293c4182c4a96d
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55686
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
This commit is contained in:
Angel Pons 2021-06-20 13:44:03 +02:00 committed by Patrick Georgi
parent 670f4ca471
commit 8ea7b31385
1 changed files with 26 additions and 26 deletions
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52
src/mainboard/lenovo/t440p/devicetree.cb
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@ -22,10 +22,10 @@ chip northbridge/intel/haswell
device domain 0 on device domain 0 on
subsystemid 0x17aa 0x220e inherit subsystemid 0x17aa 0x220e inherit
device pci 00.0 on end # Host bridge device pci 00.0 on end # Host bridge
device pci 01.0 on end # PCIe Bridge for discrete graphics device pci 01.0 on end # PCIe Bridge for discrete graphics
device pci 02.0 on end # Internal graphics VGA controller device pci 02.0 on end # Internal graphics VGA controller
device pci 03.0 on end # Mini-HD audio device pci 03.0 on end # Mini-HD audio
chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
register "gen1_dec" = "0x007c1601" register "gen1_dec" = "0x007c1601"
@ -35,26 +35,26 @@ chip northbridge/intel/haswell
register "gpi1_routing" = "2" register "gpi1_routing" = "2"
# 0(HDD), 1(M.2), 5(ODD) # 0(HDD), 1(M.2), 5(ODD)
register "sata_port_map" = "0x23" register "sata_port_map" = "0x23"
device pci 14.0 on end # xHCI Controller device pci 14.0 on end # xHCI Controller
device pci 16.0 on end # Management Engine Interface 1 device pci 16.0 on end # Management Engine Interface 1
device pci 16.1 off end # Management Engine Interface 2 device pci 16.1 off end # Management Engine Interface 2
device pci 16.2 off end # Management Engine IDE-R device pci 16.2 off end # Management Engine IDE-R
device pci 16.3 off end # Management Engine KT device pci 16.3 off end # Management Engine KT
device pci 19.0 on end # Intel Gigabit Ethernet device pci 19.0 on end # Intel Gigabit Ethernet
device pci 1a.0 on end # USB2 EHCI #2 device pci 1a.0 on end # USB2 EHCI #2
device pci 1b.0 on end # High Definition Audio Audio controller device pci 1b.0 on end # High Definition Audio Audio controller
device pci 1c.0 on end # PCIe Port #1, Realtek Card Reader device pci 1c.0 on end # PCIe Port #1, Realtek Card Reader
device pci 1c.1 on # PCIe Port #2, WLAN device pci 1c.1 on # PCIe Port #2, WLAN
smbios_slot_desc "0x14" "1" "M.2 2230" "8" smbios_slot_desc "0x14" "1" "M.2 2230" "8"
end end
device pci 1c.2 off end # PCIe Port #3 device pci 1c.2 off end # PCIe Port #3
device pci 1c.3 off end # PCIe Port #4 device pci 1c.3 off end # PCIe Port #4
device pci 1c.4 off end # PCIe Port #5 device pci 1c.4 off end # PCIe Port #5
device pci 1c.5 off end # PCIe Port #6 device pci 1c.5 off end # PCIe Port #6
device pci 1c.6 off end # PCIe Port #7 device pci 1c.6 off end # PCIe Port #7
device pci 1c.7 off end # PCIe Port #8 device pci 1c.7 off end # PCIe Port #8
device pci 1d.0 on end # USB2 EHCI #1 device pci 1d.0 on end # USB2 EHCI #1
device pci 1f.0 on # LPC bridge device pci 1f.0 on # LPC bridge
chip ec/lenovo/pmh7 chip ec/lenovo/pmh7
register "backlight_enable" = "0x01" register "backlight_enable" = "0x01"
register "dock_event_enable" = "0x01" register "dock_event_enable" = "0x01"
@ -89,10 +89,10 @@ chip northbridge/intel/haswell
device pnp 0c31.0 on end device pnp 0c31.0 on end
end end
end end
device pci 1f.2 on end # SATA Controller 1 device pci 1f.2 on end # SATA Controller 1
device pci 1f.3 on end # SMBus device pci 1f.3 on end # SMBus
device pci 1f.5 off end # SATA Controller 2 device pci 1f.5 off end # SATA Controller 2
device pci 1f.6 off end # Thermal device pci 1f.6 off end # Thermal
end end
end end
end end