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sb/intel/bd82x6x: Add defines for PCI IDs 

Add and use defines for 6 series and 7 series PCH PCH IDs.

Change-Id: I4de37d5817766b9bc4f5c2d4d472d3c456b14b29
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79546
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Patrick Rudolph 2023-12-14 14:43:54 +01:00 committed by Felix Singer
parent 893d77e3fe
commit 8ed0cd0acc
2 changed files with 82 additions and 37 deletions
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44
src/include/device/pci_ids.h
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@ -2816,6 +2816,50 @@
#define PCI_DID_INTEL_IBEXPEAK_HECI1 0x3b64 #define PCI_DID_INTEL_IBEXPEAK_HECI1 0x3b64
#define PCI_DID_INTEL_IBEXPEAK_THERMAL 0x3b32 #define PCI_DID_INTEL_IBEXPEAK_THERMAL 0x3b32
/* Intel Mobile 6 Series Chipset and 7 Series Chipset */
#define PCI_DID_INTEL_6_SERIES_MOBILE_SFF 0x1c41
#define PCI_DID_INTEL_6_SERIES_MOBILE 0x1c43
#define PCI_DID_INTEL_6_SERIES_UM67 0x1c47
#define PCI_DID_INTEL_6_SERIES_HM65 0x1c49
#define PCI_DID_INTEL_6_SERIES_HM67 0x1c4b
#define PCI_DID_INTEL_6_SERIES_QS67 0x1c4d
#define PCI_DID_INTEL_6_SERIES_QM67 0x1c4f
#define PCI_DID_INTEL_7_SERIES_MOBILE 0x1e42
#define PCI_DID_INTEL_7_SERIES_MOBILE_SFF 0x1e43
#define PCI_DID_INTEL_7_SERIES_QM77 0x1e55
#define PCI_DID_INTEL_7_SERIES_QS77 0x1e56
#define PCI_DID_INTEL_7_SERIES_HM77 0x1e57
#define PCI_DID_INTEL_7_SERIES_UM77 0x1e58
#define PCI_DID_INTEL_7_SERIES_HM76 0x1e59
#define PCI_DID_INTEL_7_SERIES_HM75 0x1e5d
#define PCI_DID_INTEL_7_SERIES_HM70 0x1e5e
#define PCI_DID_INTEL_7_SERIES_NM70 0x1e5f
/* Intel Desktop/Server 6 Series Chipset and 7 Series Chipset */
#define PCI_DID_INTEL_6_DESKTOP_SAMPLE 0x1c42
#define PCI_DID_INTEL_6_SERIES_Z68 0x1c44
#define PCI_DID_INTEL_6_SERIES_P67 0x1c46
#define PCI_DID_INTEL_6_SERIES_H67 0x1c4a
#define PCI_DID_INTEL_6_SERIES_Q65 0x1c4c
#define PCI_DID_INTEL_6_SERIES_Q67 0x1c4e
#define PCI_DID_INTEL_6_SERIES_B65 0x1c50
#define PCI_DID_INTEL_6_SERIES_C202 0x1c52
#define PCI_DID_INTEL_6_SERIES_C204 0x1c54
#define PCI_DID_INTEL_6_SERIES_C206 0x1c56
#define PCI_DID_INTEL_6_SERIES_H61 0x1c5c
#define PCI_DID_INTEL_7_SERIES_DESKTOP_SAMPLE 0x1e41
#define PCI_DID_INTEL_7_SERIES_Z77 0x1e44
#define PCI_DID_INTEL_7_SERIES_H71 0x1e45
#define PCI_DID_INTEL_7_SERIES_Z75 0x1e46
#define PCI_DID_INTEL_7_SERIES_Q77 0x1e47
#define PCI_DID_INTEL_7_SERIES_Q75 0x1e48
#define PCI_DID_INTEL_7_SERIES_B75 0x1e49
#define PCI_DID_INTEL_7_SERIES_H77 0x1e4a
#define PCI_DID_INTEL_7_SERIES_C216 0x1e53
/* Intel SDMA device Ids */ /* Intel SDMA device Ids */
#define PCI_DID_INTEL_LPT_LP_SDMA 0x9c60 #define PCI_DID_INTEL_LPT_LP_SDMA 0x9c60

75
src/southbridge/intel/bd82x6x/lpc.c
View File

@ -432,44 +432,45 @@ static const struct {
* October 2013 * October 2013
* CDI / IBP#: 440377 * CDI / IBP#: 440377
*/ */
{0x1C41, "SFF Sample"}, {PCI_DID_INTEL_6_SERIES_MOBILE_SFF, "SFF Sample"},
{0x1C42, "Desktop Sample"}, {PCI_DID_INTEL_6_DESKTOP_SAMPLE, "Desktop Sample"},
{0x1C43, "Mobile Sample"}, {PCI_DID_INTEL_6_SERIES_MOBILE, "Mobile Sample"},
{0x1C44, "Z68"}, {PCI_DID_INTEL_6_SERIES_Z68, "Z68"},
{0x1C46, "P67"}, {PCI_DID_INTEL_6_SERIES_P67, "P67"},
{0x1C47, "UM67"}, {PCI_DID_INTEL_6_SERIES_UM67, "UM67"},
{0x1C49, "HM65"}, {PCI_DID_INTEL_6_SERIES_HM65, "HM65"},
{0x1C4A, "H67"}, {PCI_DID_INTEL_6_SERIES_H67, "H67"},
{0x1C4B, "HM67"}, {PCI_DID_INTEL_6_SERIES_HM67, "HM67"},
{0x1C4C, "Q65"}, {PCI_DID_INTEL_6_SERIES_Q65, "Q65"},
{0x1C4D, "QS67"}, {PCI_DID_INTEL_6_SERIES_QS67, "QS67"},
{0x1C4E, "Q67"}, {PCI_DID_INTEL_6_SERIES_Q67, "Q67"},
{0x1C4F, "QM67"}, {PCI_DID_INTEL_6_SERIES_QM67, "QM67"},
{0x1C50, "B65"}, {PCI_DID_INTEL_6_SERIES_B65, "B65"},
{0x1C52, "C202"}, {PCI_DID_INTEL_6_SERIES_C202, "C202"},
{0x1C54, "C204"}, {PCI_DID_INTEL_6_SERIES_C204, "C204"},
{0x1C56, "C206"}, {PCI_DID_INTEL_6_SERIES_C206, "C206"},
{0x1C5C, "H61"}, {PCI_DID_INTEL_6_SERIES_H61, "H61"},
/* 7-series PCI ids from Intel document 472178 */ /* 7-series PCI ids from Intel document 472178 */
{0x1E41, "Desktop Sample"}, {PCI_DID_INTEL_7_SERIES_DESKTOP_SAMPLE, "Desktop Sample"},
{0x1E42, "Mobile Sample"}, {PCI_DID_INTEL_7_SERIES_MOBILE, "Mobile Sample"},
{0x1E43, "SFF Sample"}, {PCI_DID_INTEL_7_SERIES_MOBILE_SFF, "SFF Sample"},
{0x1E44, "Z77"}, {PCI_DID_INTEL_7_SERIES_Z77, "Z77"},
{0x1E45, "H71"}, {PCI_DID_INTEL_7_SERIES_H71, "H71"},
{0x1E46, "Z75"}, {PCI_DID_INTEL_7_SERIES_Z75, "Z75"},
{0x1E47, "Q77"}, {PCI_DID_INTEL_7_SERIES_Q77, "Q77"},
{0x1E48, "Q75"}, {PCI_DID_INTEL_7_SERIES_Q75, "Q75"},
{0x1E49, "B75"}, {PCI_DID_INTEL_7_SERIES_B75, "B75"},
{0x1E4A, "H77"}, {PCI_DID_INTEL_7_SERIES_H77, "H77"},
{0x1E53, "C216"}, {PCI_DID_INTEL_7_SERIES_C216, "C216"},
{0x1E55, "QM77"}, {PCI_DID_INTEL_7_SERIES_QM77, "QM77"},
{0x1E56, "QS77"}, {PCI_DID_INTEL_7_SERIES_QS77, "QS77"},
{0x1E58, "UM77"}, {PCI_DID_INTEL_7_SERIES_UM77, "UM77"},
{0x1E57, "HM77"}, {PCI_DID_INTEL_7_SERIES_HM77, "HM77"},
{0x1E59, "HM76"}, {PCI_DID_INTEL_7_SERIES_HM76, "HM76"},
{0x1E5D, "HM75"}, {PCI_DID_INTEL_7_SERIES_HM75, "HM75"},
{0x1E5E, "HM70"}, {PCI_DID_INTEL_7_SERIES_HM70, "HM70"},
{0x1E5F, "NM70"}, {PCI_DID_INTEL_7_SERIES_NM70, "NM70"},
}; };
static void report_pch_info(struct device *dev) static void report_pch_info(struct device *dev)