mb/intel/adlrvp: Enable pre-boot display over HDMI-B port

List of changes:
1. Configure CTRLCLK and CTRLDATA for HDMI
2. Enable Ddc and HPD for Port-B
3. Disable dual eDP configuration for Port-A and B

TEST=Able to see depthcharge pre-boot screens over HDMI-B port.

Change-Id: I7509b981f35fc60a7885b2b07067cb0d35ec625f
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47838
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Subrata Banik 2020-11-21 19:50:56 +05:30
parent 191bd82734
commit 8ed53ec8c0
2 changed files with 8 additions and 1 deletions

View file

@ -90,7 +90,9 @@ chip soc/intel/alderlake
# Enable EDP in PortA
register "DdiPortAConfig" = "1"
register "DdiPortBConfig" = "1"
# Enable HDMI in Port B
register "DdiPortBDdc" = "1"
register "DdiPortBHpd" = "1"
# TCSS USB3
register "TcssAuxOri" = "0"

View file

@ -287,6 +287,11 @@ static const struct pad_config gpio_table[] = {
PAD_CFG_NF(GPP_H21, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H22, NONE, DEEP, NF1),
PAD_CFG_NF(GPP_H23, NONE, DEEP, NF1),
/* A21 : HDMI CRLS CTRLCLK */
PAD_CFG_NF(GPP_A21, NONE, DEEP, NF1),
/* A22 : HDMI CRLS CTRLDATA */
PAD_CFG_NF(GPP_A22, NONE, DEEP, NF1),
};
void variant_configure_gpio_pads(void)