soc/intel/common: Clean up includes

Change-Id: I0081fcf3c842d8772a7045f8dc5754a2e6c039b8
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68702
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>

src/soc/intel/common/block/acpi/lpit.c

@@ -4,6 +4,7 @@
 #include <cpu/intel/msr.h>
 #include <soc/iomap.h>
 #include <soc/pmc.h>
+#include <stdint.h>
 
 unsigned long acpi_fill_lpit(unsigned long current)
 {

src/soc/intel/common/block/acpi/pep.c

@@ -1,11 +1,14 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
+#include <acpi/acpi.h>
 #include <acpi/acpigen.h>
 #include <assert.h>
+#include <commonlib/bsd/helpers.h>
 #include <console/console.h>
 #include <intelblocks/acpi.h>
 #include <intelblocks/pmc_ipc.h>
 #include <stdlib.h>
+#include <string.h>
 #include <types.h>
 
 #define LPI_S0_HELPER_UUID		"c4eb40a0-6cd2-11e2-bcfd-0800200c9a66"

src/soc/intel/common/block/gpio/gpio_dev.c

@@ -3,8 +3,8 @@
 #include <assert.h>
 #include <device/device.h>
 #include <device/gpio.h>
-#include <intelblocks/gpio.h>
 #include <gpio.h>
+#include <intelblocks/gpio.h>
 
 static struct gpio_operations gpio_ops = {
 	.get		= gpio_get,

src/soc/intel/common/block/gpmr/gpmr.c

@@ -5,6 +5,7 @@
 #include <intelblocks/ioc.h>
 #include <intelblocks/pcr.h>
 #include <soc/pcr_ids.h>
+#include <types.h>
 
 /* GPMR Register read given offset */
 uint32_t gpmr_read32(uint16_t offset)

src/soc/intel/common/block/include/intelblocks/graphics.h

@@ -4,6 +4,7 @@
 #define SOC_INTEL_COMMON_BLOCK_GRAPHICS_H
 
 #include <device/device.h>
+#include <stdint.h>
 
 /*
  * SoC overrides

src/soc/intel/common/block/pcie/pcie.c

@@ -1,11 +1,13 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <console/console.h>
+#include <device/device.h>
 #include <device/pci.h>
-#include <device/pciexp.h>
 #include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
+#include <device/pciexp.h>
+#include <stdint.h>
 
 #define CACHE_LINE_SIZE	0x10
 

src/soc/intel/common/block/pcr/pcr.c

@@ -2,13 +2,17 @@
 
 #define __SIMPLE_DEVICE__
 
-#include <device/mmio.h>
 #include <assert.h>
+#include <commonlib/bsd/helpers.h>
 #include <console/console.h>
-#include <intelblocks/pcr.h>
+#include <device/mmio.h>
+#include <device/pci_def.h>
 #include <device/pci_ops.h>
+#include <device/pci_type.h>
+#include <intelblocks/pcr.h>
 #include <soc/pci_devs.h>
 #include <timer.h>
+#include <types.h>
 
 #if (CONFIG_PCR_BASE_ADDRESS == 0)
 #error "PCR_BASE_ADDRESS need to be non-zero!"

src/soc/intel/common/block/smbus/smbus_early.c

@@ -4,8 +4,11 @@
 #include <device/pci_def.h>
 #include <device/pci_ops.h>
 #include <device/smbus_host.h>
+#include <device/pci_type.h>
 #include <intelblocks/smbus.h>
 #include <soc/pci_devs.h>
+#include <stdint.h>
+
 #include "smbuslib.h"
 
 void smbus_common_init(void)

src/soc/intel/common/block/spi/spi.c

@@ -2,17 +2,22 @@
 
 #define __SIMPLE_DEVICE__
 
+#include <assert.h>
+#include <commonlib/bsd/helpers.h>
 #include <device/device.h>
 #include <device/mmio.h>
 #include <device/pci.h>
+#include <device/pci_def.h>
 #include <device/pci_ids.h>
 #include <device/pci_ops.h>
+#include <device/pci_type.h>
 #include <device/spi.h>
 #include <intelblocks/fast_spi.h>
 #include <intelblocks/gspi.h>
 #include <intelblocks/spi.h>
 #include <soc/pci_devs.h>
 #include <spi-generic.h>
+#include <types.h>
 
 const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = {
 	{ .ctrlr = &fast_spi_flash_ctrlr, .bus_start = 0, .bus_end = 0 },

src/soc/intel/common/block/systemagent/memmap.c

@@ -2,6 +2,7 @@
 
 #include <arch/romstage.h>
 #include <cbmem.h>
+#include <commonlib/bsd/helpers.h>
 #include <console/console.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>

src/soc/intel/common/block/usb4/pcie.c

@@ -1,10 +1,12 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
+#include <acpi/acpi_device.h>
 #include <acpi/acpigen.h>
 #include <console/console.h>
 #include <device/device.h>
 #include <device/path.h>
 #include <string.h>
+
 #include "chip.h"
 
 #define PCI_HOTPLUG_IN_D3_UUID	"6211E2C0-58A3-4AF3-90E1-927A4E0C55A4"

src/soc/intel/common/block/xdci/xdci.c

@@ -5,6 +5,7 @@
 #include <device/pci_ids.h>
 #include <intelblocks/xdci.h>
 #include <security/vboot/vboot_common.h>
+#include <stdbool.h>
 
 __weak void soc_xdci_init(struct device *dev) { /* no-op */ }
 

src/soc/intel/common/fsp_reset.c

@@ -3,6 +3,7 @@
 #include <console/console.h>
 #include <fsp/util.h>
 #include <soc/intel/common/reset.h>
+#include <stdint.h>
 
 void chipset_handle_reset(uint32_t status)
 {

src/soc/intel/common/hda_verb.c

@@ -1,9 +1,10 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <console/console.h>
+#include <delay.h>
 #include <device/azalia_device.h>
 #include <device/mmio.h>
-#include <delay.h>
+#include <stdint.h>
 
 #include "hda_verb.h"
 

src/soc/intel/common/smbios.h

@@ -3,8 +3,8 @@
 #ifndef _COMMON_SMBIOS_H_
 #define _COMMON_SMBIOS_H_
 
-#include <stdint.h>
 #include <memory_info.h>
+#include <types.h>
 
 /* Offset info DIMM_INFO SpdSave for start of serial number */
 #define SPD_SAVE_OFFSET_SERIAL	5

src/soc/intel/common/vbt.c

@@ -2,9 +2,10 @@
 
 #include <acpi/acpi.h>
 #include <bootmode.h>
+#include <drivers/intel/gma/opregion.h>
+#include <stddef.h>
 
 #include "vbt.h"
-#include <drivers/intel/gma/opregion.h>
 
 void *vbt_get(void)
 {