soc/{baytrail/braswell/broadwell}: fix flashconsole on platform

Enabling flashconsole on these platforms fails to build due to
spi.c not being compiled in prior to ramstage. Include in early stages
(bootblock/romstage/postcar) as needed to enable flashconsole support.

Early inclusion of monotonic_timer.c is needed for Broadwell as well.

Change-Id: Idae0578ca92939246021bb85e34b0dcbd41df3b5
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32878
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>

src/soc/intel/baytrail/Makefile.inc

@@ -16,6 +16,8 @@ ramstage-y += tsc_freq.c
 romstage-y += tsc_freq.c
 postcar-y += tsc_freq.c
 smm-y += tsc_freq.c
+romstage-y += spi.c
+postcar-y += spi.c
 ramstage-y += spi.c
 smm-y += spi.c
 ramstage-y += chip.c

src/soc/intel/braswell/Makefile.inc

@@ -15,10 +15,12 @@ romstage-y += lpc_init.c
 romstage-y += memmap.c
 romstage-y += pmutil.c
 romstage-y += smbus.c
+romstage-y += spi.c
 romstage-y += tsc_freq.c
 
 postcar-y += memmap.c
 postcar-y += iosf.c
+postcar-y += spi.c
 postcar-y += tsc_freq.c
 
 ramstage-y += acpi.c

src/soc/intel/broadwell/Makefile.inc

@@ -39,6 +39,9 @@ ramstage-y += memmap.c
 romstage-y += memmap.c
 postcar-y += memmap.c
 ramstage-y += minihd.c
+bootblock-y += monotonic_timer.c
+romstage-y += monotonic_timer.c
+postcar-y += monotonic_timer.c
 ramstage-y += monotonic_timer.c
 smm-y      += monotonic_timer.c
 ramstage-y += pch.c
@@ -60,6 +63,9 @@ romstage-y += smbus_common.c
 ramstage-y += smi.c
 smm-y      += smihandler.c
 ramstage-y += smmrelocate.c
+bootblock-y += spi.c
+romstage-y += spi.c
+postcar-y += spi.c
 ramstage-y += spi.c
 smm-$(CONFIG_SPI_FLASH_SMM) += spi.c
 ramstage-y += stage_cache.c