buildgcc: Use upstream patch for aarch64 build issue
Upstream proposed and merged a patch fixing the ARM Trusted Firmware build issue that occurs with recent version sof binutils. This includes this patch instead of the previous one. See binutils commit 7ea12e5c3ad54da440c08f32da09534e63e515ca: "Fix the generation of alignment frags in code sections for AArch64." The issue was reported at: https://sourceware.org/bugzilla/show_bug.cgi?id=20364 Change-Id: I16a8043d3562107b8e84e93d3f3d768d26dac7e4 Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Reviewed-on: https://review.coreboot.org/16110 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Paul Kocialkowski
Patrick Georgi
parent
16559c3447
commit
8f0b4f40bf
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@ -1,32 +1,93 @@
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diff -Naur binutils-2.26.1/gas/config/tc-aarch64.c binutils-2.26.1/gas/config/tc-aarch64.c
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diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c
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--- binutils-2.26.1/gas/config/tc-aarch64.c 2016-01-25 01:51:06.000000000 -0700
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index 2d491f6..e221ef4 100644
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+++ binutils-2.26.1/gas/config/tc-aarch64.c 2016-07-14 10:05:37.667935255 -0600
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--- a/gas/config/tc-aarch64.c
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@@ -1857,12 +1857,7 @@
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+++ b/gas/config/tc-aarch64.c
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return;
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@@ -1736,13 +1736,13 @@ s_ltorg (int ignored ATTRIBUTE_UNUSED)
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}
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if (pool == NULL || pool->symbol == NULL || pool->next_free_entry == 0)
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continue;
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- /* Sections are assumed to start aligned. In executable section, there is no
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- mapping_state (MAP_DATA);
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- MAP_DATA symbol pending. So we only align the address during
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- MAP_DATA --> MAP_INSN transition.
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- For other sections, this is not guaranteed. */
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- enum mstate mapstate = seg_info (now_seg)->tc_segment_info_data.mapstate;
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- if (!need_pass_2 && subseg_text_p (now_seg) && mapstate == MAP_DATA)
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+ if (!need_pass_2)
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frag_align_code (2, 0);
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#ifdef OBJ_ELF
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@@ -6040,14 +6035,6 @@
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init_operand_error_report ();
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- /* Sections are assumed to start aligned. In executable section, there is no
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- MAP_DATA symbol pending. So we only align the address during
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- MAP_DATA --> MAP_INSN transition.
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- For other sections, this is not guaranteed. */
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- enum mstate mapstate = seg_info (now_seg)->tc_segment_info_data.mapstate;
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- if (!need_pass_2 && subseg_text_p (now_seg) && mapstate == MAP_DATA)
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- frag_align_code (2, 0);
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-
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-
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saved_cond = inst.cond;
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/* Align pool as you have word accesses.
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reset_aarch64_instruction (&inst);
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Only make a frag if we have to. */
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inst.cond = saved_cond;
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if (!need_pass_2)
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frag_align (align, 0, 0);
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+ mapping_state (MAP_DATA);
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+
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record_alignment (now_seg, align);
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sprintf (sym_name, "$$lit_\002%x", pool->id);
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@@ -6373,11 +6373,15 @@ aarch64_init_frag (fragS * fragP, int max_chars)
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switch (fragP->fr_type)
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{
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- case rs_align:
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case rs_align_test:
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case rs_fill:
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mapping_state_2 (MAP_DATA, max_chars);
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break;
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+ case rs_align:
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+ /* PR 20364: We can get alignment frags in code sections,
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+ so do not just assume that we should use the MAP_DATA state. */
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+ mapping_state_2 (subseg_text_p (now_seg) ? MAP_INSN : MAP_DATA, max_chars);
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+ break;
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case rs_align_code:
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mapping_state_2 (MAP_INSN, max_chars);
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break;
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diff --git a/gas/testsuite/gas/aarch64/pr20364.d b/gas/testsuite/gas/aarch64/pr20364.d
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new file mode 100644
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index 0000000..babcff1
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--- /dev/null
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+++ b/gas/testsuite/gas/aarch64/pr20364.d
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@@ -0,0 +1,13 @@
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+# Check that ".align <size>, <fill>" does not set the mapping state to DATA, causing unnecessary frag generation.
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+#name: PR20364
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+#objdump: -d
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+
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+.*: file format .*
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+
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+Disassembly of section \.vectors:
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+
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+0+000 <.*>:
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+ 0: d2800000 mov x0, #0x0 // #0
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+ 4: 94000000 bl 0 <plat_report_exception>
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+ 8: 17fffffe b 0 <bl1_exceptions>
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+
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diff --git a/gas/testsuite/gas/aarch64/pr20364.s b/gas/testsuite/gas/aarch64/pr20364.s
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new file mode 100644
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index 0000000..594ad7c
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--- /dev/null
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+++ b/gas/testsuite/gas/aarch64/pr20364.s
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@@ -0,0 +1,28 @@
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+ .macro vector_base label
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+ .section .vectors, "ax"
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+ .align 11, 0
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+ \label:
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+ .endm
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+
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+ .macro vector_entry label
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+ .section .vectors, "ax"
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+ .align 7, 0
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+ \label:
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+ .endm
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+
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+ .macro check_vector_size since
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+ .if (. - \since) > (32 * 4)
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+ .error "Vector exceeds 32 instructions"
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+ .endif
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+ .endm
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+
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+ .globl bl1_exceptions
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+
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+vector_base bl1_exceptions
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+
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+vector_entry SynchronousExceptionSP0
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+ mov x0, #0x0
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+ bl plat_report_exception
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+ b SynchronousExceptionSP0
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+ check_vector_size SynchronousExceptionSP0
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+
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--
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1.7.1
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