soc/amd: introduce and use common amd_cpu_bus_ops struct

The device operations for the CPU bus are identical for all AMD SoCs, so
introduce a common device operations struct for this and use it in all
AMD SoC's chipset devicetrees as ops for the CPU cluster.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id32f89b8a33db8dbb747b917eeac3009fbae6631
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71998
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
This commit is contained in:
Felix Held 2023-01-16 20:06:31 +01:00
parent d4cc902c57
commit 8f2e5c90e4
15 changed files with 17 additions and 50 deletions

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@ -12,13 +12,6 @@
#include <types.h> #include <types.h>
#include "chip.h" #include "chip.h"
struct device_operations cezanne_cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
.acpi_fill_ssdt = generate_cpu_entries,
};
static const char *soc_acpi_name(const struct device *dev) static const char *soc_acpi_name(const struct device *dev)
{ {
if (dev->path.type == DEVICE_PATH_DOMAIN) if (dev->path.type == DEVICE_PATH_DOMAIN)

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@ -1,6 +1,6 @@
chip soc/amd/cezanne chip soc/amd/cezanne
device cpu_cluster 0 on device cpu_cluster 0 on
ops cezanne_cpu_bus_ops ops amd_cpu_bus_ops
end end
device domain 0 on device domain 0 on
ops cezanne_pci_domain_ops ops cezanne_pci_domain_ops

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@ -1,9 +1,18 @@
/* SPDX-License-Identifier: GPL-2.0-only */ /* SPDX-License-Identifier: GPL-2.0-only */
#include <acpi/acpi.h>
#include <amdblocks/cpu.h> #include <amdblocks/cpu.h>
#include <cpu/cpu.h> #include <cpu/cpu.h>
#include <device/device.h>
int get_cpu_count(void) int get_cpu_count(void)
{ {
return 1 + (cpuid_ecx(0x80000008) & 0xff); return 1 + (cpuid_ecx(0x80000008) & 0xff);
} }
struct device_operations amd_cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
.acpi_fill_ssdt = generate_cpu_entries,
};

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@ -14,13 +14,6 @@
#include <types.h> #include <types.h>
#include "chip.h" #include "chip.h"
struct device_operations glinda_cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
.acpi_fill_ssdt = generate_cpu_entries,
};
static const char *soc_acpi_name(const struct device *dev) static const char *soc_acpi_name(const struct device *dev)
{ {
if (dev->path.type == DEVICE_PATH_DOMAIN) if (dev->path.type == DEVICE_PATH_DOMAIN)

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@ -2,7 +2,7 @@
chip soc/amd/glinda chip soc/amd/glinda
device cpu_cluster 0 on device cpu_cluster 0 on
ops glinda_cpu_bus_ops ops amd_cpu_bus_ops
end end
device domain 0 on device domain 0 on
ops glinda_pci_domain_ops ops glinda_pci_domain_ops

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@ -14,13 +14,6 @@
#include <types.h> #include <types.h>
#include "chip.h" #include "chip.h"
struct device_operations mendocino_cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
.acpi_fill_ssdt = generate_cpu_entries,
};
static const char *soc_acpi_name(const struct device *dev) static const char *soc_acpi_name(const struct device *dev)
{ {
if (dev->path.type == DEVICE_PATH_DOMAIN) if (dev->path.type == DEVICE_PATH_DOMAIN)

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@ -1,6 +1,6 @@
chip soc/amd/mendocino chip soc/amd/mendocino
device cpu_cluster 0 on device cpu_cluster 0 on
ops mendocino_cpu_bus_ops ops amd_cpu_bus_ops
end end
device domain 0 on device domain 0 on
ops mendocino_pci_domain_ops ops mendocino_pci_domain_ops

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@ -1,6 +1,6 @@
chip soc/amd/mendocino chip soc/amd/mendocino
device cpu_cluster 0 on device cpu_cluster 0 on
ops mendocino_cpu_bus_ops ops amd_cpu_bus_ops
end end
device domain 0 on device domain 0 on
ops mendocino_pci_domain_ops ops mendocino_pci_domain_ops

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@ -14,13 +14,6 @@
#include <types.h> #include <types.h>
#include "chip.h" #include "chip.h"
struct device_operations phoenix_cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
.acpi_fill_ssdt = generate_cpu_entries,
};
static const char *soc_acpi_name(const struct device *dev) static const char *soc_acpi_name(const struct device *dev)
{ {
if (dev->path.type == DEVICE_PATH_DOMAIN) if (dev->path.type == DEVICE_PATH_DOMAIN)

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@ -2,7 +2,7 @@
chip soc/amd/phoenix chip soc/amd/phoenix
device cpu_cluster 0 on device cpu_cluster 0 on
ops phoenix_cpu_bus_ops ops amd_cpu_bus_ops
end end
device domain 0 on device domain 0 on
ops phoenix_pci_domain_ops ops phoenix_pci_domain_ops

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@ -13,13 +13,6 @@
#include "chip.h" #include "chip.h"
#include <fsp/api.h> #include <fsp/api.h>
struct device_operations picasso_cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
.acpi_fill_ssdt = generate_cpu_entries,
};
static const char *soc_acpi_name(const struct device *dev) static const char *soc_acpi_name(const struct device *dev)
{ {
if (dev->path.type == DEVICE_PATH_DOMAIN) if (dev->path.type == DEVICE_PATH_DOMAIN)

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@ -2,7 +2,7 @@
chip soc/amd/picasso chip soc/amd/picasso
device cpu_cluster 0 on device cpu_cluster 0 on
ops picasso_cpu_bus_ops ops amd_cpu_bus_ops
end end
device domain 0 on device domain 0 on
ops picasso_pci_domain_ops ops picasso_pci_domain_ops

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@ -18,13 +18,6 @@
#include "chip.h" #include "chip.h"
struct device_operations stoneyridge_cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
.acpi_fill_ssdt = generate_cpu_entries,
};
const char *soc_acpi_name(const struct device *dev) const char *soc_acpi_name(const struct device *dev)
{ {
if (dev->path.type == DEVICE_PATH_DOMAIN) if (dev->path.type == DEVICE_PATH_DOMAIN)

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@ -2,7 +2,7 @@
chip soc/amd/stoneyridge chip soc/amd/stoneyridge
device cpu_cluster 0 on device cpu_cluster 0 on
ops stoneyridge_cpu_bus_ops ops amd_cpu_bus_ops
end end
device domain 0 on device domain 0 on
ops stoneyridge_pci_domain_ops ops stoneyridge_pci_domain_ops

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@ -2,7 +2,7 @@
chip soc/amd/stoneyridge chip soc/amd/stoneyridge
device cpu_cluster 0 on device cpu_cluster 0 on
ops stoneyridge_cpu_bus_ops ops amd_cpu_bus_ops
end end
device domain 0 on device domain 0 on
ops stoneyridge_pci_domain_ops ops stoneyridge_pci_domain_ops