soc/amd: introduce and use common amd_cpu_bus_ops struct
The device operations for the CPU bus are identical for all AMD SoCs, so introduce a common device operations struct for this and use it in all AMD SoC's chipset devicetrees as ops for the CPU cluster. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: Id32f89b8a33db8dbb747b917eeac3009fbae6631 Reviewed-on: https://review.coreboot.org/c/coreboot/+/71998 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
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@ -12,13 +12,6 @@
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#include <types.h>
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#include "chip.h"
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struct device_operations cezanne_cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = mp_cpu_bus_init,
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.acpi_fill_ssdt = generate_cpu_entries,
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};
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static const char *soc_acpi_name(const struct device *dev)
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{
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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@ -1,6 +1,6 @@
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chip soc/amd/cezanne
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device cpu_cluster 0 on
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ops cezanne_cpu_bus_ops
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ops amd_cpu_bus_ops
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end
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device domain 0 on
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ops cezanne_pci_domain_ops
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@ -1,9 +1,18 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <acpi/acpi.h>
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#include <amdblocks/cpu.h>
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#include <cpu/cpu.h>
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#include <device/device.h>
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int get_cpu_count(void)
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{
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return 1 + (cpuid_ecx(0x80000008) & 0xff);
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}
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struct device_operations amd_cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = mp_cpu_bus_init,
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.acpi_fill_ssdt = generate_cpu_entries,
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};
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@ -14,13 +14,6 @@
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#include <types.h>
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#include "chip.h"
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struct device_operations glinda_cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = mp_cpu_bus_init,
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.acpi_fill_ssdt = generate_cpu_entries,
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};
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static const char *soc_acpi_name(const struct device *dev)
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{
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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@ -2,7 +2,7 @@
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chip soc/amd/glinda
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device cpu_cluster 0 on
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ops glinda_cpu_bus_ops
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ops amd_cpu_bus_ops
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end
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device domain 0 on
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ops glinda_pci_domain_ops
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@ -14,13 +14,6 @@
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#include <types.h>
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#include "chip.h"
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struct device_operations mendocino_cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = mp_cpu_bus_init,
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.acpi_fill_ssdt = generate_cpu_entries,
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};
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static const char *soc_acpi_name(const struct device *dev)
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{
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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@ -1,6 +1,6 @@
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chip soc/amd/mendocino
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device cpu_cluster 0 on
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ops mendocino_cpu_bus_ops
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ops amd_cpu_bus_ops
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end
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device domain 0 on
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ops mendocino_pci_domain_ops
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@ -1,6 +1,6 @@
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chip soc/amd/mendocino
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device cpu_cluster 0 on
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ops mendocino_cpu_bus_ops
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ops amd_cpu_bus_ops
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end
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device domain 0 on
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ops mendocino_pci_domain_ops
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@ -14,13 +14,6 @@
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#include <types.h>
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#include "chip.h"
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struct device_operations phoenix_cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = mp_cpu_bus_init,
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.acpi_fill_ssdt = generate_cpu_entries,
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};
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static const char *soc_acpi_name(const struct device *dev)
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{
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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@ -2,7 +2,7 @@
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chip soc/amd/phoenix
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device cpu_cluster 0 on
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ops phoenix_cpu_bus_ops
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ops amd_cpu_bus_ops
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end
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device domain 0 on
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ops phoenix_pci_domain_ops
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@ -13,13 +13,6 @@
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#include "chip.h"
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#include <fsp/api.h>
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struct device_operations picasso_cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = mp_cpu_bus_init,
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.acpi_fill_ssdt = generate_cpu_entries,
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};
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static const char *soc_acpi_name(const struct device *dev)
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{
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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@ -2,7 +2,7 @@
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chip soc/amd/picasso
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device cpu_cluster 0 on
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ops picasso_cpu_bus_ops
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ops amd_cpu_bus_ops
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end
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device domain 0 on
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ops picasso_pci_domain_ops
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@ -18,13 +18,6 @@
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#include "chip.h"
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struct device_operations stoneyridge_cpu_bus_ops = {
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.read_resources = noop_read_resources,
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.set_resources = noop_set_resources,
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.init = mp_cpu_bus_init,
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.acpi_fill_ssdt = generate_cpu_entries,
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};
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const char *soc_acpi_name(const struct device *dev)
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{
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if (dev->path.type == DEVICE_PATH_DOMAIN)
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@ -2,7 +2,7 @@
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chip soc/amd/stoneyridge
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device cpu_cluster 0 on
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ops stoneyridge_cpu_bus_ops
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ops amd_cpu_bus_ops
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end
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device domain 0 on
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ops stoneyridge_pci_domain_ops
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@ -2,7 +2,7 @@
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chip soc/amd/stoneyridge
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device cpu_cluster 0 on
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ops stoneyridge_cpu_bus_ops
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ops amd_cpu_bus_ops
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end
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device domain 0 on
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ops stoneyridge_pci_domain_ops
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