soc/intel/skylake: Define mask for SMI handlers that can be run in SCI mode
This change adds a mask to allow SMI handlers to be run even in SCI mode. This prevents any SMI handlers from accidentally taking unnecessary action in SCI mode. Add APM_STS and SMI_ON_SLP_EN_STS to this mask to allow gsmi and sleep to work in SCI mode. BUG=b:67874513 Change-Id: I298f8f6ce28c9746cbc1fb6fc96035b98a17a9e3 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/22087 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
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@ -510,6 +510,13 @@ static smi_handler_t southbridge_smi[SMI_STS_BITS] = {
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[MONITOR_STS_BIT] = southbridge_smi_monitor,
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};
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#define SMI_HANDLER_SCI_EN(__bit) (1 << (__bit))
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/* SMI handlers that should be serviced in SCI mode too. */
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uint32_t smi_handler_sci_mask =
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SMI_HANDLER_SCI_EN(APM_STS_BIT) |
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SMI_HANDLER_SCI_EN(SMI_ON_SLP_EN_STS_BIT);
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/*
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* Interrupt handler for SMI#
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*/
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@ -524,6 +531,17 @@ void southbridge_smi_handler(void)
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*/
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smi_sts = pmc_clear_smi_status();
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/*
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* In SCI mode, execute only those SMI handlers that have
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* declared themselves as available for service in that mode
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* using smi_handler_sci_mask.
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*/
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if (pmc_read_pm1_control() & SCI_EN)
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smi_sts &= smi_handler_sci_mask;
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if (!smi_sts)
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return;
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/* Call SMI sub handler for each of the status bits */
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for (i = 0; i < ARRAY_SIZE(southbridge_smi); i++) {
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if (smi_sts & (1 << i)) {
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