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soc/intel/skylake: Define mask for SMI handlers that can be run in SCI mode 

This change adds a mask to allow SMI handlers to be run even in SCI
mode. This prevents any SMI handlers from accidentally taking
unnecessary action in SCI mode.

Add APM_STS and SMI_ON_SLP_EN_STS to this mask to allow gsmi and sleep
to work in SCI mode.

BUG=b:67874513

Change-Id: I298f8f6ce28c9746cbc1fb6fc96035b98a17a9e3
Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-on: https://review.coreboot.org/22087
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
This commit is contained in:
Furquan Shaikh 2017-10-16 22:49:05 -07:00 committed by Furquan Shaikh
parent c565bd44d1
commit 8f2eadd8d0
1 changed files with 18 additions and 0 deletions
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18
src/soc/intel/skylake/smihandler.c
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@ -510,6 +510,13 @@ static smi_handler_t southbridge_smi[SMI_STS_BITS] = {
[MONITOR_STS_BIT] = southbridge_smi_monitor, [MONITOR_STS_BIT] = southbridge_smi_monitor,
}; };
#define SMI_HANDLER_SCI_EN(__bit) (1 << (__bit))
/* SMI handlers that should be serviced in SCI mode too. */
uint32_t smi_handler_sci_mask =
SMI_HANDLER_SCI_EN(APM_STS_BIT) |
SMI_HANDLER_SCI_EN(SMI_ON_SLP_EN_STS_BIT);
/* /*
* Interrupt handler for SMI# * Interrupt handler for SMI#
*/ */
@ -524,6 +531,17 @@ void southbridge_smi_handler(void)
*/ */
smi_sts = pmc_clear_smi_status(); smi_sts = pmc_clear_smi_status();
/*
* In SCI mode, execute only those SMI handlers that have
* declared themselves as available for service in that mode
* using smi_handler_sci_mask.
*/
if (pmc_read_pm1_control() & SCI_EN)
smi_sts &= smi_handler_sci_mask;
if (!smi_sts)
return;
/* Call SMI sub handler for each of the status bits */ /* Call SMI sub handler for each of the status bits */
for (i = 0; i < ARRAY_SIZE(southbridge_smi); i++) { for (i = 0; i < ARRAY_SIZE(southbridge_smi); i++) {
if (smi_sts & (1 << i)) { if (smi_sts & (1 << i)) {