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veyron_pinky: Add rev2 support, clean up mainboard.c 

This patch adds support for the board changes in rev2 (board_id = 0001).
It also moves the existing mainboard.c code around a bit to group it by
component.

BUG=chrome-os-partner:32139
TEST=Booted on rev1. Confirmed SD card still works. Confirmed power
button was still as broken as before.

Original-Change-Id: Ifc4876687db64ca50e41d009d911446129d57b1b
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/220251

(cherry picked from commit 9428e0d1b784b27790b3b3dbbb18a769e51c6fd3)
Signed-off-by: Aaron Durbin <adurbin@chromium.org>

Change-Id: I8d3479aa314f8c6f1591c1b69b0a3827234fc730
Reviewed-on: http://review.coreboot.org/9237
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
This commit is contained in:
Julius Werner 2014-09-26 21:01:08 -07:00 committed by Aaron Durbin
parent 5c2988c461
commit 8f3883d5f4
7 changed files with 123 additions and 67 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
src/mainboard/google/veyron_pinky/Makefile.inc
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@ -17,12 +17,15 @@
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
##
bootblock-y += bootblock.c
bootblock-y += boardid.c
bootblock-y += chromeos.c
bootblock-y += reset.c
verstage-y += boardid.c
verstage-y += chromeos.c
verstage-y += reset.c
romstage-y += boardid.c
romstage-y += romstage.c
romstage-y += chromeos.c
romstage-y += sdram_configs.c

32
src/mainboard/google/veyron_pinky/board.h Normal file
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@ -0,0 +1,32 @@
/*
* This file is part of the coreboot project.
*
* Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#ifndef __MAINBOARD_GOOGLE_VEYRON_PINKY_BOARD_H
#define __MAINBOARD_GOOGLE_VEYRON_PINKY_BOARD_H
#include <boardid.h>
#include <soc/rockchip/rk3288/gpio.h>
#define PMIC_BUS 0
#define GPIO_RESET (board_id() > 0 ? GPIO(0, B, 5) : GPIO(0, B, 2))
/* TODO: move setup_chromeos_gpios() here once bootblock code is in mainboard */
#endif /* __MAINBOARD_GOOGLE_VEYRON_PINKY_BOARD_H */

6
src/mainboard/google/veyron_pinky/chromeos.c
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@ -25,8 +25,10 @@
#include <vendorcode/google/chromeos/chromeos.h>
#include <soc/rockchip/rk3288/gpio.h>
#include "board.h"
#define GPIO_WP GPIO(7, A, 6)
#define GPIO_LID GPIO(7, B, 5)
#define GPIO_LID (board_id() > 0 ? GPIO(0, A, 6) : GPIO(7, B, 5))
#define GPIO_POWER GPIO(0, A, 5)
#define GPIO_RECOVERY GPIO(0, B, 1)
@ -34,7 +36,7 @@ void setup_chromeos_gpios(void)
{
gpio_input(GPIO_WP);
gpio_input_pullup(GPIO_LID);
gpio_input_pullup(GPIO_POWER);
gpio_input(GPIO_POWER);
gpio_input_pullup(GPIO_RECOVERY);
}

137
src/mainboard/google/veyron_pinky/mainboard.c
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@ -32,97 +32,106 @@
#include <soc/rockchip/rk3288/rk808.h>
#include <soc/rockchip/rk3288/spi.h>
#define DRAM_START (CONFIG_SYS_SDRAM_BASE >> 20)
#define DRAM_SIZE CONFIG_DRAM_SIZE_MB
#define DRAM_END (DRAM_START + DRAM_SIZE)
#include "board.h"
static void setup_gpio(void)
static void configure_usb(void)
{
/*SOC and TPM reset GPIO, active high.*/
gpio_output(GPIO(0, B, 2), 0);
gpio_output(GPIO(0, B, 3), 1); /* HOST1_PWR_EN */
gpio_output(GPIO(0, B, 4), 1); /* USBOTG_PWREN_H */
/* Configure GPIO for lcd_bl_en */
gpio_output(GPIO(7, A, 2), 1);
/*Configure backlight PWM 100% brightness*/
gpio_output(GPIO(7, A, 0), 0);
/* Configure GPIO for lcd_en */
gpio_output(GPIO(7, B, 7), 1);
}
static void setup_iomux(void)
{
/*i2c0 for pmic*/
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL);
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA);
/*i2c2 for codec*/
writel(IOMUX_I2C2, &rk3288_grf->iomux_i2c2);
writel(IOMUX_I2S, &rk3288_grf->iomux_i2s);
writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk);
writel(IOMUX_LCDC, &rk3288_grf->iomux_lcdc);
writel(IOMUX_SDMMC0, &rk3288_grf->iomux_sdmmc0);
writel(IOMUX_EMMCDATA, &rk3288_grf->iomux_emmcdata);
writel(IOMUX_EMMCPWREN, &rk3288_grf->iomux_emmcpwren);
writel(IOMUX_EMMCCMD, &rk3288_grf->iomux_emmccmd);
}
static void setup_usb_poweron(void)
{
/* Configure GPIO for usb1_pwr_en */
gpio_output(GPIO(0, B, 3), 1);
/* Configure GPIO for usb2_pwr_en */
gpio_output(GPIO(0, B, 4), 1);
/* Configure GPIO for 5v_drv */
gpio_output(GPIO(7, B, 3), 1);
switch (board_id()) {
case 0:
gpio_output(GPIO(7, B, 3), 1); /* 5V_DRV */
break;
default:
break; /* 5V_DRV moved to EC after rev1 */
}
}
static void configure_sdmmc(void)
{
/* Configure GPIO for sd_en */
gpio_output(GPIO(7, C, 5), 1);
writel(IOMUX_SDMMC0, &rk3288_grf->iomux_sdmmc0);
/* Configure GPIO for sd_detec */
gpio_input_pullup(GPIO(7, A, 5));
/*use sdmmc0 io, disable JTAG function*/
/* use sdmmc0 io, disable JTAG function */
writel(RK_CLRBITS(1 << 12), &rk3288_grf->soc_con0);
switch (board_id()) {
case 0:
rk808_configure_ldo(PMIC_BUS, 8, 3300); /* VCCIO_SD */
gpio_output(GPIO(7, C, 5), 1); /* SD_EN */
break;
default:
rk808_configure_ldo(PMIC_BUS, 4, 3300); /* VCCIO_SD */
rk808_configure_ldo(PMIC_BUS, 5, 3300); /* VCC33_SD */
break;
}
gpio_input(GPIO(7, A, 5)); /* SD_DET */
}
static void configure_emmc(void)
{
/* Configure GPIO for emmc_pwrctrl */
gpio_output(GPIO(7, B, 4), 1);
writel(IOMUX_EMMCDATA, &rk3288_grf->iomux_emmcdata);
writel(IOMUX_EMMCPWREN, &rk3288_grf->iomux_emmcpwren);
writel(IOMUX_EMMCCMD, &rk3288_grf->iomux_emmccmd);
gpio_output(GPIO(7, B, 4), 1); /* EMMC_RST_L */
}
static void configure_i2s(void)
static void configure_codec(void)
{
/*AUDIO IO domain 1.8V voltage selection*/
writel(IOMUX_I2C2, &rk3288_grf->iomux_i2c2); /* CODEC I2C */
writel(IOMUX_I2S, &rk3288_grf->iomux_i2s);
writel(IOMUX_I2SCLK, &rk3288_grf->iomux_i2sclk);
switch (board_id()) {
case 0:
rk808_configure_ldo(PMIC_BUS, 5, 1800); /* VCC18_CODEC */
break;
default:
rk808_configure_ldo(PMIC_BUS, 6, 1800); /* VCC18_CODEC */
break;
}
/* AUDIO IO domain 1.8V voltage selection */
writel(RK_SETBITS(1 << 6), &rk3288_grf->io_vsel);
rkclk_configure_i2s(12288000);
}
static void pmic_init(unsigned int bus)
static void configure_lcd(void)
{
rk808_configure_ldo(bus, 4, 1800); /* VCC18_LCD */
rk808_configure_ldo(bus, 5, 1800); /* VCC18_CODEC */
rk808_configure_ldo(bus, 6, 1000); /* VCC10_LCD */
rk808_configure_ldo(bus, 8, 3300); /* VCCIO_SD */
writel(IOMUX_LCDC, &rk3288_grf->iomux_lcdc);
switch (board_id()) {
case 0:
rk808_configure_ldo(PMIC_BUS, 4, 1800); /* VCC18_LCD */
rk808_configure_ldo(PMIC_BUS, 6, 1000); /* VCC10_LCD */
gpio_output(GPIO(7, B, 7), 1); /* LCD_EN */
break;
default:
rk808_configure_switch(PMIC_BUS, 2, 1); /* VCC18_LCD */
rk808_configure_ldo(PMIC_BUS, 7, 3300); /* VCC10_LCD_PWREN_H */
rk808_configure_switch(PMIC_BUS, 1, 1); /* VCC33_LCD */
break;
}
gpio_output(GPIO(7, A, 0), 0); /* LCDC_BL */
gpio_output(GPIO(7, A, 2), 1); /* BL_EN */
}
static void mainboard_init(device_t dev)
{
setup_iomux();
pmic_init(0);
setup_gpio();
setup_usb_poweron();
setbits_le32(&rk3288_pmu->iomux_i2c0scl, IOMUX_I2C0SCL); /* PMIC I2C */
setbits_le32(&rk3288_pmu->iomux_i2c0sda, IOMUX_I2C0SDA); /* PMIC I2C */
gpio_output(GPIO_RESET, 0);
configure_usb();
configure_sdmmc();
configure_emmc();
configure_i2s();
configure_codec();
configure_lcd();
}
static void mainboard_enable(device_t dev)

4
src/mainboard/google/veyron_pinky/reset.c
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@ -21,8 +21,10 @@
#include <soc/rockchip/rk3288/gpio.h>
#include <reset.h>
#include "board.h"
void hard_reset(void)
{
gpio_output(GPIO(0, B, 2), 1);
gpio_output(GPIO_RESET, 1);
while (1);
}

7
src/soc/rockchip/rk3288/rk808.c
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@ -26,6 +26,7 @@
#define RK808_ADDR 0x1b
#define DCDC_EN 0x23
#define LDO_EN 0x24
#define LDO_ONSEL(i) (0x39 + 2 * i)
#define LDO_SLPSEL(i) (0x3a + 2 * i)
@ -39,6 +40,12 @@ static void rk808_clrsetbits(uint8_t bus, uint8_t reg, uint8_t clr, uint8_t set)
printk(BIOS_ERR, "ERROR: Cannot set Rk808[%#x]!\n", reg);
}
void rk808_configure_switch(uint8_t bus, int sw, int enabled)
{
assert(sw == 1 || sw == 2);
rk808_clrsetbits(bus, DCDC_EN, 1 << (sw + 4), !!enabled << (sw + 4));
}
void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts)
{
uint8_t vsel;

1
src/soc/rockchip/rk3288/rk808.h
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@ -20,6 +20,7 @@
#ifndef __SOC_ROCKCHIP_RK3288_PMIC_H__
#define __SOC_ROCKCHIP_RK3288_PMIC_H__
void rk808_configure_switch(uint8_t bus, int sw, int enabled);
void rk808_configure_ldo(uint8_t bus, int ldo, int millivolts);
#endif