From 8f38e5f5dc88aa8f2bd5d2a49c4761aca2817de7 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Fri, 11 Feb 2022 21:58:16 +0100 Subject: [PATCH] sb/amd/cimx/sb800/amd_pci_int_defs.h: Fix serial IRQ INT name in comment Change-Id: If351d93c47de2ef76fb24525ff6d134b35c5f3fe Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/61876 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h b/src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h index 05ccd08e03..b3fb37dbc8 100644 --- a/src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h +++ b/src/southbridge/amd/cimx/sb800/amd_pci_int_defs.h @@ -24,9 +24,9 @@ #define PIRQ_MISC1 0x0A /* Miscellaneous1 IRQ Settings */ #define PIRQ_MISC2 0x0B /* Miscellaneous2 IRQ Settings */ #define PIRQ_SIRQA 0x0C /* Serial IRQ INTA */ -#define PIRQ_SIRQB 0x0D /* Serial IRQ INTA */ -#define PIRQ_SIRQC 0x0E /* Serial IRQ INTA */ -#define PIRQ_SIRQD 0x0F /* Serial IRQ INTA */ +#define PIRQ_SIRQB 0x0D /* Serial IRQ INTB */ +#define PIRQ_SIRQC 0x0E /* Serial IRQ INTC */ +#define PIRQ_SIRQD 0x0F /* Serial IRQ INTD */ #define PIRQ_SCI 0x10 /* SCI IRQ */ #define PIRQ_SMBUS 0x11 /* SMBUS 14h.0 */ #define PIRQ_ASF 0x12 /* ASF */