mb/google/poppy: Add support for ACPI brightness controls

Change-Id: Ie7eb4c43178acff2dc5ff7c685e71990d8f353c9
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39945
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
This commit is contained in:
Matt DeVillier 2019-11-27 22:55:43 -06:00
parent 79b35019a3
commit 8f42472faa
8 changed files with 22 additions and 0 deletions

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@ -41,6 +41,7 @@ DefinitionBlock(
#include <soc/intel/skylake/acpi/ipu.asl> #include <soc/intel/skylake/acpi/ipu.asl>
#include <soc/intel/skylake/acpi/systemagent.asl> #include <soc/intel/skylake/acpi/systemagent.asl>
#include <soc/intel/skylake/acpi/pch.asl> #include <soc/intel/skylake/acpi/pch.asl>
#include <drivers/intel/gma/acpi/default_brightness_levels.asl>
} }
} }

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@ -1,5 +1,8 @@
chip soc/intel/skylake chip soc/intel/skylake
# IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "gpu_pp_up_delay_ms" = "200" register "gpu_pp_up_delay_ms" = "200"
register "gpu_pp_down_delay_ms" = "50" register "gpu_pp_down_delay_ms" = "50"
register "gpu_pp_cycle_delay_ms" = "600" register "gpu_pp_cycle_delay_ms" = "600"

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@ -1,5 +1,8 @@
chip soc/intel/skylake chip soc/intel/skylake
# IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Deep Sx states # Deep Sx states
register "deep_s3_enable_ac" = "0" register "deep_s3_enable_ac" = "0"
register "deep_s3_enable_dc" = "0" register "deep_s3_enable_dc" = "0"

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@ -1,5 +1,8 @@
chip soc/intel/skylake chip soc/intel/skylake
# IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Deep Sx states # Deep Sx states
register "deep_s3_enable_ac" = "0" register "deep_s3_enable_ac" = "0"
register "deep_s3_enable_dc" = "1" register "deep_s3_enable_dc" = "1"

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@ -1,5 +1,8 @@
chip soc/intel/skylake chip soc/intel/skylake
# IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Deep Sx states # Deep Sx states
register "deep_s3_enable_ac" = "0" register "deep_s3_enable_ac" = "0"
register "deep_s3_enable_dc" = "0" register "deep_s3_enable_dc" = "0"

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@ -1,5 +1,8 @@
chip soc/intel/skylake chip soc/intel/skylake
# IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Deep Sx states # Deep Sx states
register "deep_s3_enable_ac" = "0" register "deep_s3_enable_ac" = "0"
register "deep_s3_enable_dc" = "0" register "deep_s3_enable_dc" = "0"

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@ -1,5 +1,8 @@
chip soc/intel/skylake chip soc/intel/skylake
# IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
register "gpu_pp_up_delay_ms" = "200" register "gpu_pp_up_delay_ms" = "200"
register "gpu_pp_down_delay_ms" = "500" register "gpu_pp_down_delay_ms" = "500"
register "gpu_pp_cycle_delay_ms" = "600" register "gpu_pp_cycle_delay_ms" = "600"

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@ -1,5 +1,8 @@
chip soc/intel/skylake chip soc/intel/skylake
# IGD Displays
register "gfx" = "GMA_STATIC_DISPLAYS(0)"
# Deep Sx states # Deep Sx states
register "deep_s3_enable_ac" = "0" register "deep_s3_enable_ac" = "0"
register "deep_s3_enable_dc" = "0" register "deep_s3_enable_dc" = "0"