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mb/google/brya/var/vell: Set empty on USB2_9/USB32_1 

The baseboard uses port USB2 #9, and USB3 #1, but vell does not,
therefore set the port configuration to EMPTY.

Change-Id: I0d03b967fd2a051205ad5807f0bd8916bad7c036
Signed-off-by: Shon <shon.wang@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64628
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Shon 2022-05-24 16:12:11 +08:00 committed by Martin L Roth
parent 2bbb6f3064
commit 8f6dd2a4bd
1 changed files with 4 additions and 0 deletions
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4
src/mainboard/google/brya/variants/vell/overridetree.cb
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@ -60,6 +60,10 @@ chip soc/intel/alderlake
}" }"
register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)" # USB2_C3 register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)" # USB2_C3
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)"
register "usb2_ports[8]" = "USB2_PORT_EMPTY"
register "usb3_ports[0]" = "USB3_PORT_EMPTY"
register "tcss_ports[3]" = "TCSS_PORT_DEFAULT(OC3)" register "tcss_ports[3]" = "TCSS_PORT_DEFAULT(OC3)"
register "sagv" = "SaGv_Enabled" register "sagv" = "SaGv_Enabled"