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mb/google/brask/variants/moli: correct tcss_usb3 port 

Correct tcss_usb3_port to meet Moli's schematic design.

BUG=b:220814038
TEST=emerge-brask coreboot

Signed-off-by: Casper Chang <casper_chang@wistron.corp-partner.google.com>
Change-Id: Ib8faa4a353d8d617fce7aa70922bf027e6e11b38
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64039
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
This commit is contained in:
Casper Chang 2022-05-04 10:43:48 +08:00 committed by Tim Wawrzynczak
parent 4beeb90813
commit 8f6fd32648
1 changed files with 2 additions and 2 deletions
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4
src/mainboard/google/brya/variants/moli/overridetree.cb
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@ -144,7 +144,7 @@ chip soc/intel/alderlake
end end
chip drivers/intel/pmc_mux/conn chip drivers/intel/pmc_mux/conn
use usb2_port3 as usb2_port use usb2_port3 as usb2_port
use tcss_usb3_port2 as usb3_port use tcss_usb3_port3 as usb3_port
device generic 1 alias conn1 on end device generic 1 alias conn1 on end
end end
end end
@ -163,7 +163,7 @@ chip soc/intel/alderlake
register "desc" = ""USB3 Type-C Port C2 (MLB)"" register "desc" = ""USB3 Type-C Port C2 (MLB)""
register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH"
register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, RIGHT, ACPI_PLD_GROUP(2, 1))" register "custom_pld" = "ACPI_PLD_TYPE_C(FRONT, RIGHT, ACPI_PLD_GROUP(2, 1))"
device ref tcss_usb3_port2 on end device ref tcss_usb3_port3 on end
end end
end end
end end